Refer to the PDF data sheet for device specific package drawings
For more details about features and additional description information on the device General-Purpose Memory Controller, see the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description.
Table 7-48 represents GPMC timing conditions.
The IO timings provided in this section are applicable for all combinations of signals for GPMC0. However, the timings are only valid for GPMC0 if signals within a single IOSET are used. The IOSETs are defined in the Section 18.104.22.168.4 , GPMC0_IOSET,table.
|tSR||Input slew rate||1.65||4||V/ns|
|CLOAD||Output load capacitance||5||20||pF|