SLVSBA8G March   2012  – March 2018 DRV110

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      DRV110 Supplied by Power Line Voltage
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Keep Time
      2. 7.3.2 PWM Current Control
      3. 7.3.3 Configuring Peak and Hold Currents
      4. 7.3.4 Configuring the PWM Frequency
      5. 7.3.5 Voltage Supply and Integrated Zener Diode
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Limiting Resistor Selection
        2. 8.2.2.2 Passive Component Selection
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 Voltage Supply and Integrated Zener Diode

Voltage at the OUT pin, that is the gate voltage of an external switching device, is equal to VIN voltage during the ON-cycle. The voltage is driven to ground during the OFF-cycle. VIN voltages below VZENER can be supplied directly from an external voltage source. Supply voltages of at least 6 V are supported.

The DRV110 is able to regulate VIN voltage from a higher external supply voltage, VS, by an internal bypass regulator that replicates the function of an ideal Zener diode. This requires that the supply current is sufficiently limited by an external resistor between VS and the VIN pin. An external capacitor connected to the VIN pin is used to store enough energy to charge the external switch gate capacitance at the OUT pin. A range of current limiting resistor sizes (RS,min and RS,max) can be calculated with Equation 5 and Equation 6. This range keeps the VIN current within the recommended operating conditions.

Equation 5. DRV110 eq5_lvsba8.gif

where

  • IGate,AVE is the current flowing to the external switch. For a MOSFET, IGate,AVE is equal to the external FET gate charge multiplied by fPWM.
Equation 6. DRV110 eq5-min_lvsba8.gif

Ideally, the DRV110 device clamps the input voltage to 15 V. For configurations that do not use the EN pin (force the pin high or leave it floating), the DRV110 device clamps at 15 V (VZENER = 15 V) across the temperature range of the device. If the EN pin is set to 0, then refer to the values in Table 1 to find the VZENER used when calculating the value of RS, based on the temperature range of the application. Because the VZENER changes when the EN state changes, select a value for RS that meets the current requirements at both VZENER voltages.

Table 1. VZENER Value

TEMPERATURE RANGE ENABLE STATE VZENER
–40°C ≤ TA ≤ 125°C 1 15 V
–40°C ≤ TA ≤ 35°C 0 15 V
–40°C ≤ TA ≤ 45°C 0 14.2 V
–40°C ≤ TA ≤ 55°C 0 13.9 V
–40°C ≤ TA ≤ 65°C 0 13.5 V
–40°C ≤ TA ≤ 75°C 0 13.1 V
–40°C ≤ TA ≤ 85°C 0 12.7 V
–40°C ≤ TA ≤ 95°C 0 12.3 V
–40°C ≤ TA ≤ 105°C 0 12 V
–40°C ≤ TA ≤ 115°C 0 11.4 V
–40°C ≤ TA ≤ 125°C 0 11 V

The open-drain pulldown path at the STATUS pin is deactivated if the undervoltage lockout or thermal shutdown blocks have triggered or if the EN pin is low.