SLOS751D March 2013 – November 2018 DRV2667
To maintain compatibility with the majority of standard I2C controllers, the DRV2667 device uses 8-bit addressing. To access 2 kB of RAM, a paging system is employed. The page register is located at address 0xFF. There are 8 memory pages that make up the 2048 bytes with 256 bytes on each page. Note that page 0 is reserved for register control space, as shown in Figure 24.
Because the device addresses are only 8-bits, a special exception exists to distinguish whether the user is trying to write the page register at address 0xFF or the memory location at 0xPFF, where P represents the page number. In order to access the page register, the programmer must use a Single-Byte I2C protocol to perform a single-byte write to memory location 0xFF (see Single-Byte Write). To access the memory location in RAM at register 0xFF, the user must use the Incremental Multiple-Byte protocol (see Multiple-Byte Write and Incremental Multiple-Byte Write), and the beginning address must be less than 0xFF.
The page register automatically increments for multiple-byte writes that cross the page boundaries, as a convenience for filling memory across multiple pages. Multiple-byte reads across page boundaries are not supported. All memory is retained in the device until the device power is cycled.