SLVSEE3B November   2017  – October 2019 DRV3245Q-Q1


  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4Revision History
  5. 5Device and Documentation Support
    1. 5.1 Device Support
      1. 5.1.1 Device Nomenclature
    2. 5.2 Documentation Support
    3. 5.3 Receiving Notification of Documentation Updates
    4. 5.4 Community Resources
    5. 5.5 Trademarks
    6. 5.6 Electrostatic Discharge Caution
    7. 5.7 Glossary
  6. 6Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information


The DRV3245Q-Q1 device is a FET gate driver IC for three-phase motor-drive applications designed according to the applicable requirements of ISO 26262 for functional safety applications. The device provides three half-bridge drivers each capable of driving a high-side and low-side N-channel MOSFET while also providing sophisticated protection and monitoring of the FETs. A charge-pump driver enables 100% duty cycle and supports low battery voltages during cold-crank operation. The integration of current-sense amplifiers, integrated phase comparators, and SPI-based configuration of the driver and its peripherals enable reduction of the bill of materials (BOM) and space on the printed circuit board (PCB) because of the elimination of most external and passive components.

The DRV3245Q-Q1 device also integrates diagnostics and protection for each internal block and provides support for common system diagnostic checks each of which can be instantiated and reported through SPI. This flexibility of the integrated features allows the device to integrate seamlessly into a variety of safety architectures.

Device Information (1)

DRV3245Q-Q1 HTQFP (48) 7.00 mm × 7.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.