SLIS162H December 2014 – August 2018 DRV5013-Q1
The DRV5013-Q1 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V).
In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings specified in the Absolute Maximum Ratings.
|FET overload (OCP)||ISINK ≥ IOCP||Operating||Output current is clamped to IOCP||IO < IOCP|
|Load dump||38 V < VCC < 40 V||Operating||Device will operate for a transient duration||VCC ≤ 38 V|
|Reverse supply||–22 V < VCC < 0 V||Disabled||Device will survive this condition||VCC ≥ 2.7 V|