SLOSE60B May   2020  – May 2022 DRV8424E , DRV8425E

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Control
      3. 7.3.3 Current Regulation
      4. 7.3.4 Decay Modes
        1. 7.3.4.1 Mixed Decay
        2. 7.3.4.2 Fast Decay
        3. 7.3.4.3 Smart tune Dynamic Decay
        4. 7.3.4.4 Smart tune Ripple Control
        5. 7.3.4.5 Blanking time
      5. 7.3.5 Charge Pump
      6. 7.3.6 Linear Voltage Regulators
      7. 7.3.7 Logic and Quad-Level Pin Diagrams
      8. 7.3.8 nFAULT Pin
      9. 7.3.9 Protection Circuits
        1. 7.3.9.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.9.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.9.3 Overcurrent Protection (OCP)
        4. 7.3.9.4 Thermal Shutdown (OTSD)
        5. 7.3.9.5 Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 nSLEEP Reset Pulse
      4. 7.4.4 Functional Modes Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Power Dissipation and Thermal Calculation
      3. 8.2.3 Application Curves
    3. 8.3 Alternate Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
        1. 8.3.2.1 Current Regulation
        2. 8.3.2.2 Stepper Motor Speed
        3. 8.3.2.3 Decay Modes
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Functions

PINTYPEDESCRIPTION
NAMEPWPRGE
DRV8424E, DRV8425EDRV8424P, DRV8425PDRV8424E, DRV8425EDRV8424P, DRV8425P
ADECAY21211616IDecay mode setting pin. Set the decay mode for bridge A; quad-level pin.
AEN25—20—IBridge A enable input. Logic high enables bridge A; logic low disables the bridge Hi-Z.
AIN1—25—20IBridge A PWM input. Logic controls the state of H-bridge A; internal pulldown.
AIN2—24—19IBridge B PWM input. Logic controls the state of H-bridge B; internal pulldown.
AOUT14, 54, 533OWinding A output. Connect to motor winding.
AOUT26, 76, 744OWinding A output. Connect to motor winding.
APH24—19—IBridge A phase input. Logic high drives current from AOUT1 to AOUT2.
VREFA18181313IReference voltage input. Voltage on this pin sets the full scale chopping current in H-bridge A.
BDECAY20201515IDecay mode setting pin. Set the decay mode for bridge B; quad-level pin.
BEN23—18—IBridge B enable input. Logic high enables bridge B; logic low disables the bridge Hi-Z.
BIN1—23—18IBridge B PWM input. Logic controls the state of H-bridge B; internal pulldown.
BIN2—22—17IBridge B PWM input. Logic controls the state of H-bridge B; internal pulldown.
BOUT110, 1110, 1166OWinding B output. Connect to motor winding.
BOUT28, 98, 955OWinding B output. Connect to motor winding.
BPH22—17—IBridge B phase input. Logic high drives current from BOUT1 to BOUT2.
VREFB17171212IReference voltage input. Voltage on this pin sets the full scale chopping current in H-bridge B.
CPH28282323PWRCharge pump switching node. Connect a X7R, 0.022-μF, VM-rated ceramic capacitor from CPH to CPL.
CPL27272222
GND141499PWRDevice ground. Connect to system ground.
TOFF19191414ISets the decay mode off-time during current chopping; quad-level pin. Also sets the ripple current in smart tune ripple control mode.
DVDD15151010PWRLogic supply voltage. Connect a X7R, 0.47-μF to 1-μF, 6.3-V or 10-V rated ceramic capacitor to GND.
VCP112424OCharge pump output. Connect a X7R, 0.22-μF, 16-V ceramic capacitor to VM.
VM2, 132, 131, 81, 8PWRPower supply. Connect to motor supply voltage and bypass to PGND with two 0.01-μF ceramic capacitors (one for each pin) plus a bulk capacitor rated for VM.
PGND3, 123, 122, 72, 7PWRPower ground. Connect to system ground.
nFAULT16161111OFault indication. Pulled logic low with fault condition; open-drain output requires an external pullup resistor.
nSLEEP26262121ISleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. An nSLEEP low pulse clears faults.
PAD-----Thermal pad. Connect to system ground.