The gate-driver circuit monitors the VDS voltage of each external FET when it is driving current. When the voltage monitored is greater than the OCP threshold voltage (VDS(OCP)) after the OCP deglitch time has expired, an OCP condition is detected. The VDS(OCP) voltage can be adjusted by changing the resistor (RVDS) on the VDS pin of the DRV8702D-Q1 device. The DRV8703D-Q1 device provides VDS(OCP) voltage levels by setting the VDS register.
The VDS voltage on the high-side FET is measured across the VDRAIN to SH pin. The low-side VDS monitor measures the VDS voltage across the SH to SP pins. Ensure that the SP pin is always connected to the source of the low-side FET of half-bridge, even when the sense amplifier is not used.