If the voltage across the VDS overcurrent comparator exceeds the VDS_LVL for longer than the tDS_DG time, the DRV871x-Q1 detects a VDS overcurrent condition. The voltage threshold and deglitch time can be adjusted through the VDS_LVL and VDS_DG register settings. Additionally, in independent half-bridge and DRV8714-Q1 split HS/LS PWM control (BRG_MODE = 00b, 11b) the device can be configured to disable all half-bridges or only the associated half-bridge in which the fault occurred through the VDS_IND register setting. In the DRV8714-Q1 PH/EN and PWM H-bridge control modes (BRG_MODE = 01b, 10b), the VDS_IND register setting can be used to disable all H-bridges or only the associated H-bridge in which the fault occurred.
On SPI device variants, the VDS overcurrent monitor can respond and recover in four different modes set through the VDS_MODE register setting.
On H/W device variants, the VDS overcurrent mode is fixed to cycle by cycle and tVDS_DG is fixed to 4 µs. Independent half-bridge shutdown is automatically enabled for the independent half-bridge and split HS/LS PWM control modes. Independent H-bridge shutdown is automatically enabled for the H-bridge PWM control modes. Additionally, the VDS overcurrent protection can be disabled through level 6 of the VDS pin multi-level input.
When a VDS overcurrent fault occurs, the gate pull down current can be configured in order to increase or decrease the time to disable the external MOSFET. This can help to avoid a slow-turn off during high-current short circuit conditions. This setting is configure through the VDS_IDRVN register setting on SPI devices. On hardware devices, this setting is automatically matched to the programmed IDRVN current.