SLVS855J July 2008 – March 2015 DRV8800 , DRV8801
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | ||||
---|---|---|---|---|---|---|
NAME | DRV8800 | DRV8801 | ||||
WQFN | HTSSOP | WQFN | HTSSOP | |||
CP1 | 10 | 11 | 10 | 11 | P | Charge pump switching node. Connect a 0.1-μF X7R ceramic capacitor rated for VBB between CP1 and CP2. |
CP2 | 11 | 12 | 11 | 12 | P | Charge pump switching node. Connect a 0.1-μF X7R ceramic capacitor rated for VBB between CP1 and CP2. |
ENABLE | 4 | 6 | 4 | 6 | I | Enable logic input. Set high to enable the H-bridge. |
GND | 2 | 4 | 2 | 4 | P | Device ground |
MODE | 16 | 2 | — | — | I | Mode logic input |
MODE 1 | — | — | 16 | 2 | I | Mode logic input |
MODE 2 | — | — | 5 | 16 | I | Mode 2 logic input |
NC | 5 | 16 | — | — | NC | No connect |
nFAULT | 15 | 1 | 15 | 1 | OD | Pulled logic low in FAULT condition. Open-drain output requires external pullup. |
nSLEEP | 3 | 5 | 3 | 5 | I | Sleep logic input. Set low to enter low-power sleep mode. |
OUT+ | 6 | 7 | 6 | 7 | O | DMOS H-bridge output. Connect to motor terminal. |
OUT- | 9 | 10 | 9 | 10 | O | DMOS H-bridge output. Connect to motor terminal. |
PHASE | 1 | 3 | 1 | 3 | I | WQFN Package: Phase logic input for direction control. HTSSOP Package: Phase logic input. Controls the direction of the H-bridge. |
VBB | 8 | 9 | 8 | 9 | P | Connect to motor power supply. Bypass to ground with 0.1-μF ceramic capacitor and appropriate bulk capacitance rated for VBB. |
VCP | 13 | 14 | 13 | 14 | P | Charge pump output. Connect a 0.1-µF 16-V ceramic capacitor between VCP and VBB. |
VREG | 14 | 15 | — | — | P | Regulated voltage. |
VPROPI | — | — | 14 | 15 | O | Voltage output proportional to winding current. |
PowerPAD | — | — | — | — | — | Exposed pad for thermal dissipation. Connect to ground. |