SLVS855J July   2008  – March 2015 DRV8800 , DRV8801

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1  Logic Inputs
      2. 9.3.2  VREG (DRV8800 Only)
      3. 9.3.3  VPROPI (DRV8801 Only)
      4. 9.3.4  Charge Pump
      5. 9.3.5  Shutdown
      6. 9.3.6  Low-Power Mode
      7. 9.3.7  Braking
      8. 9.3.8  Diagnostic Output
      9. 9.3.9  Thermal Shutdown (TSD)
      10. 9.3.10 Overcurrent Protection
      11. 9.3.11 SENSE
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device Operation
        1. 9.4.1.1 Slow-Decay SR (Brake Mode)
        2. 9.4.1.2 Fast Decay With Synchronous Rectification
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Motor Voltage
        2. 10.2.2.2 Power Dissipation
        3. 10.2.2.3 Motor Current Trip Point
        4. 10.2.2.4 Sense Resistor Selection
        5. 10.2.2.5 Drive Current
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Bulk Capacitance
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DRV8800 RTY Package
16-Pin WQFN
Top View
DRV8800 DRV8801 po_01_slvs855.gif
DRV8800 PWP Package
16-Pin HTSSOP
Top View
DRV8800 DRV8801 po_03_slvs855.gif
DRV8801 RTY Package
16-Pin WQFN
Top View
DRV8800 DRV8801 po_02_slvs855.gif
DRV8801 PWP Package
16-Pin HTSSOP
Top View
DRV8800 DRV8801 po_04_slvs855.gif

Pin Functions

PIN I/O DESCRIPTION
NAME DRV8800 DRV8801
WQFN HTSSOP WQFN HTSSOP
CP1 10 11 10 11 P Charge pump switching node. Connect a 0.1-μF X7R ceramic capacitor rated for VBB between CP1 and CP2.
CP2 11 12 11 12 P Charge pump switching node. Connect a 0.1-μF X7R ceramic capacitor rated for VBB between CP1 and CP2.
ENABLE 4 6 4 6 I Enable logic input. Set high to enable the H-bridge.
GND 2 4 2 4 P Device ground
MODE 16 2 — — I Mode logic input
MODE 1 — — 16 2 I Mode logic input
MODE 2 — — 5 16 I Mode 2 logic input
NC 5 16 — — NC No connect
nFAULT 15 1 15 1 OD Pulled logic low in FAULT condition. Open-drain output requires external pullup.
nSLEEP 3 5 3 5 I Sleep logic input. Set low to enter low-power sleep mode.
OUT+ 6 7 6 7 O DMOS H-bridge output. Connect to motor terminal.
OUT- 9 10 9 10 O DMOS H-bridge output. Connect to motor terminal.
PHASE 1 3 1 3 I WQFN Package: Phase logic input for direction control.
HTSSOP Package: Phase logic input. Controls the direction of the H-bridge.
VBB 8 9 8 9 P Connect to motor power supply. Bypass to ground with 0.1-μF ceramic capacitor and appropriate bulk capacitance rated for VBB.
VCP 13 14 13 14 P Charge pump output. Connect a 0.1-µF 16-V ceramic capacitor between VCP and VBB.
VREG 14 15 — — P Regulated voltage.
VPROPI — — 14 15 O Voltage output proportional to winding current.
PowerPAD — — — — — Exposed pad for thermal dissipation. Connect to ground.