SLVSDS6B August   2019  – January 2021 DRV8876-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 External Components
      2. 7.3.2 Control Modes
        1. 7.3.2.1 PH/EN Control Mode (PMODE = Logic Low)
        2. 7.3.2.2 PWM Control Mode (PMODE = Logic High)
        3. 7.3.2.3 Independent Half-Bridge Control Mode (PMODE = Hi-Z)
      3. 7.3.3 Current Sense and Regulation
        1. 7.3.3.1 Current Sensing
        2. 7.3.3.2 Current Regulation
          1. 7.3.3.2.1 Fixed Off-Time Current Chopping
          2. 7.3.3.2.2 Cycle-By-Cycle Current Chopping
      4. 7.3.4 Protection Circuits
        1. 7.3.4.1 VM Supply Undervoltage Lockout (UVLO)
        2. 7.3.4.2 VCP Charge Pump Undervoltage Lockout (CPUV)
        3. 7.3.4.3 OUTx Overcurrent Protection (OCP)
        4. 7.3.4.4 Thermal Shutdown (TSD)
        5. 7.3.4.5 Fault Condition Summary
      5. 7.3.5 Pin Diagrams
        1. 7.3.5.1 Logic-Level Inputs
        2. 7.3.5.2 Tri-Level Inputs
        3. 7.3.5.3 Quad-Level Inputs
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Low-Power Sleep Mode
      3. 7.4.3 Fault Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Primary Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Current Sense and Regulation
          2. 8.2.1.2.2 Power Dissipation and Output Current Capability
          3. 8.2.1.2.3 Thermal Performance
            1. 8.2.1.2.3.1 Steady-State Thermal Performance
            2. 8.2.1.2.3.2 Transient Thermal Performance
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Alternative Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Current Sense and Regulation
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 HTSSOP Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

4.5 V ≤ VVM ≤ 37 V, –40°C ≤ TJ ≤ 150°C (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLIES (VCP, VM)
IVMQVM sleep mode currentVVM = 13.5 V, nSLEEP = 0 V, TJ = 25°C0.751µA
nSLEEP = 0 V5µA
IVMVM active mode currentVVM = 13.5 V, nSLEEP = 5 V,
EN/IN1 = PH/IN2 = 0 V		37mA
tWAKETurnon timeVVM > VUVLO, nSLEEP = 5 V to active1ms
tSLEEPTurnoff timenSLEEP = 0 V to sleep mode1ms
VVCPCharge pump regulator voltageVCP with respect to VM, VVM = 13.5 V5V
fVCPCharge pump switching frequency400kHz
LOGIC-LEVEL INPUTS (EN/IN1, PH/IN2, nSLEEP)
VILInput logic low voltageVVM < 5 V00.7V
VVM ≥ 5 V00.8
VIHInput logic high voltage1.55.5V
VHYSInput hysteresis200mV
nSLEEP50mV
IILInput logic low currentVI = 0 V–55µA
IIHInput logic high currentVI = 5 V5075µA
RPDInput pulldown resistanceTo GND100kΩ
TRI-LEVEL INPUTS (PMODE)
VTILTri-level input logic low voltage00.65V
VTIZTri-level input Hi-Z voltage4.5 V < VVM < 5.5 V0.91.01.1V
5.5 V ≤ VVM ≤ 37 V0.91.11.2
VTIHTri-level input logic high voltage1.55.5V
ITILTri-level input logic low currentVI = 0 V–50–32µA
ITIZTri-level input Hi-Z currentVI = 1.1 V–1010µA
ITIHTri-level input logic high currentVI = 5 V113150µA
RTPDTri-level pulldown resistanceTo GND44kΩ
RTPUTri-level pullup resistanceTo internal 5 V156kΩ
QUAD-LEVEL INPUTS (IMODE)
VQI2Quad-level input level 1Voltage to set quad-level 100.45V
RQI2Quad-level input level 2Resistance to GND to set quad-level 218.62021.4kΩ
RQI3Quad-level input level 3Resistance to GND to set quad-level 357.66266.4kΩ
VQI4Quad-level input level 4Voltage to set quad-level 42.55.5V
RQPDQuad-level pulldown resistanceTo GND136kΩ
RQPUQuad-level pullup resistanceTo internal 5 V68kΩ
OPEN-DRAIN OUTPUTS (nFAULT)
VOLOutput logic low voltageIOD = 5 mA0.35V
IOZOutput logic high currentVOD = 5 V–22µA
DRIVER OUTPUTS (OUT1, OUT2)
RDS(on)_HSHigh-side MOSFET on resistanceVVM = 13.5 V, IO = 1 A, TJ = 25°C350420mΩ
VVM = 13.5 V, IO = 1 A, TJ = 150°C525660mΩ
RDS(on)_LSLow-side MOSFET on resistanceVVM = 13.5 V, IO = –1 A, TJ = 25°C350420mΩ
VVM = 13.5 V, IO = –1 A, TJ = 150°C525660mΩ
VSDBody diode forward voltageISD = 1 A0.9V
tRISEOutput rise timeVVM = 13.5 V, OUTx rising 10% to 90%1µs
tFALLOutput fall timeVVM = 13.5 V, OUTx falling 90% to 10%1µs
tPDInput to output propagation delayEN/IN1, PH/IN2 to OUTx, 200 Ω from OUTx to GND1.75µs
tDEADOutput dead timeBody diode conducting750ns
CURRENT SENSE AND REGULATION (IPROPI, VREF)
AIPROPICurrent mirror scaling factor1000µA/A
AERR(1)Current mirror scaling errorIOUT < 0.15 A,
5.5 V ≤ VVM ≤ 37 V 		–7.5 7.5mA
0.15 A ≤ IOUT < 0.5 A,
5.5 V ≤ VVM ≤ 37 V 		–5 5%
0.5 A ≤ IOUT ≤ 2 A, 5.5 V ≤ VVM ≤ 37 V,
–40℃ ≤ TJ < 125℃		–4 4
0.5 A ≤ IOUT ≤ 2 A, 5.5 V ≤ VVM ≤ 37 V,
125℃ ≤ TJ ≤ 150℃		–5 5
tOFFCurrent regulation off time25µs
tDELAYCurrent sense delay time6µs
tDEGCurrent regulation deglitch time1.7µs
tBLKCurrent regulation blanking time2.7µs
PROTECTION CIRCUITS
VUVLOSupply undervoltage lockout (UVLO)VVM rising4.34.454.6V
VVM falling4.24.354.5V
VUVLO_HYSSupply UVLO hysteresis100mV
tUVLOSupply undervoltage deglitch time10µs
VCPUVCharge pump undervoltage lockoutVCP with respect to VM, VVCP falling2.25V
IOCPOvercurrent protection trip point3.55.5A
tOCPOvercurrent protection deglitch time3µs
tRETRYOvercurrent protection retry time2ms
TTSDThermal shutdown temperature160175190°C
THYSThermal shutdown hysteresis20°C
(1) At low currents, the IPROPI output has a fixed offset error with respect to the IOUT current through the low-side power MOSFETs.
GUID-1D6D54E4-D90F-4A88-AF58-87CFA8F5A704-low.gifFigure 6-1 Timing Parameter Diagram