SNLS243H September   2006  – March 2016 DS25MB100

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CML Inputs and EQ
      2. 8.3.2 Multiplexer and Loopback Control
      3. 8.3.3 CML Drivers and Pre-Emphasis Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • NJK|36
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 2:1 Multiplexer and 1:2 Buffer
  • 0.25-Gbps to 2.5-Gbps Fully Differential Data Paths
  • Fixed Input Equalization
  • Programmable Output Pre-Emphasis
  • Independent Pre-Emphasis Controls
  • Programmable Loopback Modes
  • On-Chip Terminations
  • ESD Rating of 6-kV HBM
  • 3.3-V Supply
  • Low power, 0.45 W Typical
  • Lead-Less WQFN-36 Package
  • −40°C to +85°C Operating Temperature Range

2 Applications

  • Backplane Drivers or Cable Driver
  • Redundancy and Signal Conditioning Applications
  • CPRI/OBSAI

3 Description

The DS25MB100 device is a signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane-redundancy or cable driving applications. Signal conditioning features include continuous time linear equalization (CTLE) and programmable output pre-emphasis that enable data communication in FR4 backplane up to 2.5 Gbps. Each input stage has a fixed equalizer to reduce ISI distortion from board traces.

All output drivers have four selectable levels of pre-emphasis to compensate for transmission losses from long FR4 backplane or cable attenuation reducing deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100-Ω differential terminating resistors. All driver outputs are internally terminated with 50-Ω terminating resistors to VCC.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
DS25MB100 WQFN (36) 6.00 mm × 6.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Block Diagram

DS25MB100 20208901.gif
All CML inputs and outputs must be AC coupled for optimal performance.