SNLS200B September   2005  – January 2019 DS90LV049H

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Dual-In-Line
      2.      Functional Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DS90LV049H LVDS Driver and Receiver Functionality
      2. 8.3.2 Termination
      3. 8.3.3 Fail-Safe Feature
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Decoupling Recommendations
        2. 9.2.2.2 PCB Transmission Lines
        3. 9.2.2.3 Input Fail-Safe Biasing
        4. 9.2.2.4 Probing LVDS Transmission Lines on PCB
        5. 9.2.2.5 Interconnecting Media
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1 Absolute Maximum Ratings(1)(12)

MIN MAX UNIT
Supply Voltage (VDD) −0.3 4 V
LVCMOS Input Voltage (DIN) −0.3 (VDD + 0.3) V
LVDS Input Voltage (RIN+, RIN–) −0.3 V
Enable Input Voltage (EN, EN) −0.3 (VDD + 0.3) V
LVCMOS Output Voltage (ROUT) −0.3 (VDD + 0.3) V
LVDS Output Voltage (DOUT+, DOUT–) −0.3 3.9 V
LVCMOS Output Short Circuit Current (ROUT) 100 mA
LVDS Output Short Circuit Current (DOUT+, DOUT–) 24 mA
LVDS Output Short Circuit Current Duration (DOUT+, DOUT−) Continuous
Lead Temperature Range   Soldering (4 sec.) 260 °C
Maximum Junction Temperature 150 °C
Maximum Package Power Dissipation at +25°C PW0016A Package 866 mW
Derate PW0016A Package ( above +25°C) 6.9 mW/°C
Storage Temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.