SNLS477B October 2014 – November 2018 DS90UB948-Q1
Because the DS90UB948-Q1 contains two ports, some registers must be duplicated to allow control and monitoring of the two ports. To facilitate this, PORT1_SEL and PORT0_SEL bits (0x34[1:0]) register controls access to the two sets of registers. Registers that are shared between ports (not duplicated) are available independent of the settings in the PORT_SEL register.
Setting the PORT1_SEL and PORT0_SEL bit allows a read of the register for the selected port. If both bits are set, port1 registers are returned. Writes occur to ports for which the select bit is set, allowing simultaneous writes to both ports if both select bits are set.