SNLS589B September 2016 – July 2018 DS90UB960-Q1
The DS90UB960-Q1 receiver will adapt by default based on the FPD-Link error checking during the Adaptive Equalization process. The specific errors linked to equalizer adaption, FPD-Link III clock recovery error, packet encoding error, and parity error can be individually selected in AEQ_CTL register 0x42 (See Table 83). Errors are accumulated over 1/2 of the period of the timer set by the ADAPTIVE_EQ_RELOCK_TIME. If the number of errors is greater than the programmed threshold (AEQ_ERR_THOLD), the AEQ will attempt to increase the EQ setting.