SNLS589B September 2016 – July 2018 DS90UB960-Q1
Input jitter tolerance is the ability of the clock and data recovery (CDR) and phase-locked loop (PLL) of the receiver to track and recover the incoming serial data stream. Jitter tolerance at a specific frequency is the maximum jitter permissible before data errors occur. The Figure 15 shows the allowable total jitter of the receiver inputs and must be less than the values in Table 4.
|INTERFACE||JITTER AMPLITUDE (UI p-p)||FREQUENCY (MHz) (1)|
|1||0.4||FPD3_PCLK / 80||FPD3_PCLK / 15|