SNLS589B September 2016 – July 2018 DS90UB960-Q1
|5||LINK_SFIL_WAIT||R/W||1||During SFILTER adaption, setting this bit will cause the Lock detect circuit to ignore errors during the SFILTER wait period after the SFILTER control is updated.
1: Errors during SFILTER Wait period will be ignored
0: Errors during SFILTER Wait period will not be ignored and may cause loss of Lock
|4||LINK_ERR_COUNT_EN||R/W||1||Enable serial link data integrity error count
1: Enable error count
|3:0||LINK_ERR_THRESH||R/W||0x3||Link error count threshold.
The Link Error Counter monitors the forward channel link and determines when link will be dropped. The link error counter is pixel clock based. clk0, clk1, parity, and DCA are monitored for link errors. If the error counter is enabled, the deserializer will lose lock once the error counter reaches the LINK_ERR_THRESH value. If the link error counter is disabled, the deserilizer will lose lock after one error.