SNLS589B September 2016 – July 2018 DS90UB960-Q1
Each GPIO pin can has a input disable and a pulldown disable. By default, the GPIO pin input paths are enabled and the internal pulldown circuit in the GPIO is enabled. The GPIO_INPUT_CTL register 0x0F (Table 36) and GPIO_PD_CTL register 0xBE (Table 179) allow control of the input enable and the pulldown respectively. For most applications, there is no need to modify the default register settings.