SNLS589B September 2016 – July 2018 DS90UB960-Q1
RX port specific register. The FPD-Link III Port Select register 0x4C configures which unique Rx port registers can be accessed by I2C read and write commands.
|7||SFILTER_MAXED||R/RC||0||SFILTER has reached limit
When set, the adaptive control of the SFILTER has reached the maximum limit and the algorithm is unable to further adapt. This register is cleared on read.
|6||SFILTER_STABLE||R/LL||0||Indicates SFILTER setting is stable
This register bit value is latched low. Read to clear for current status.
|5:0||SFILTER_CDLY||R||0x0||SFITLER Clock Delay
Current value of clock delay control to SFILTER circuit