SLVSGX0 May   2022 ESD752

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings—JEDEC Specification
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 AEC-Q101 Qualified and Temperature Range
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IO Capacitance
      4. 7.3.4 Dynamic Resistance
      5. 7.3.5 DC Breakdown Voltage
      6. 7.3.6 Ultra Low Leakage Current
      7. 7.3.7 Clamping Voltage
      8. 7.3.8 Industry Standard Leaded Packages
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCK|3
  • DBZ|3
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The ESD752 and ESD7x2 has a VRWM of ± 24 V to prevent the diode from being damaged during a short event that can occur when one of the USB PD slower speed lines (CC1, CC2, SBU1, SBU2, D+, and D-) is shorted to VBUS. The bidirectional characteristic ensures both positive and negative polarity are protected. The low 1.5 pF capacitance of the ESD7x2 device ensures data rates up to 480 Mbps, which allows the designer to meet the requirements for the D+ and D- signals. The ESD752 has an IPP = 6 A (8/20 µs) surge current capability making it suitable for protecting the VBUS power rail.