SBOS062C September   2000  – January 2022 INA126 , INA2126

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: INA126
    5. 6.5 Thermal Information: INA2126
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Single-Supply Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Gain
        2. 8.2.2.2 Offset Trimming
        3. 8.2.2.3 Input Bias Current Return
        4. 8.2.2.4 Input Common-Mode Range
        5. 8.2.2.5 Input Protection
        6. 8.2.2.6 Channel Crosstalk—Dual Version
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Low-Voltage Operation
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 PSpice® for TI
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Thermal Information: INA2126

THERMAL METRIC(1) INA2126 UNIT
PDIP SOIC SSOP
16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 39.3 76.2 115.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 26.2 37.8 67.0 °C/W
RθJB Junction-to-board thermal resistance 20.1 33.5 58.3 °C/W
ψJT Junction-to-top characterization parameter 10.7 7.5 19.9 °C/W
ψJB Junction-to-board characterization parameter 19.9 33.3 57.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.