SLYS018C April   2018  – April 2020 INA181-Q1 , INA2181-Q1 , INA4181-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Circuit
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions: INA181-Q1 (Single Channel)
    2.     Pin Functions: INA2181-Q1 (Dual Channel) and INA4181-Q1 (Quad Channel)
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 High Bandwidth and Slew Rate
      2. 8.3.2 Bidirectional Current Monitoring
      3. 8.3.3 Wide Input Common-Mode Voltage Range
      4. 8.3.4 Precise Low-Side Current Sensing
      5. 8.3.5 Rail-to-Rail Output Swing
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Unidirectional Mode
      3. 8.4.3 Bidirectional Mode
      4. 8.4.4 Input Differential Overload
      5. 8.4.5 Shutdown Mode
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 RSENSE and Device Gain Selection
      3. 9.1.3 Signal Filtering
      4. 9.1.4 Summing Multiple Currents
      5. 9.1.5 Detecting Leakage Currents
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Common-Mode Transients Greater Than 26 V
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Support Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The maximum value of the current sense resistor is calculated based on the maximum power loss requirement. By applying Equation 2, the maximum value of the current-sense resistor is calculated to be 1.125 mΩ. This is the maximum value for sense resistor RSENSE; therefore, select RSENSE to be 1 mΩ because it is the closest standard resistor value that meets the power-loss requirement.

The next step is to select the appropriate gain and reduce RSENSE, if needed, to keep the output signal swing within the VS range. The design requirements call for bidirectional current monitoring; therefore, a voltage between 0 and VS must be applied to the REF pin. The bidirectional currents monitored are symmetric around 0 (that is, ±20 A); therefore, the ideal voltage to apply to VREF is VS / 2 or 2.5 V. If the positive current is greater than the negative current, using a lower voltage on VREF has the benefit of maximizing the output swing for the given range of expected currents. Using Equation 3, and given that IMAX = 20 A , RSENSE = 1 mΩ, and VREF = 2.5 V, the maximum current-sense gain calculated to avoid the positive swing-to-rail limitations on the output is 122.5. Likewise, using Equation 4 for the negative-swing limitation results in a maximum gain of 124.75. Selecting the gain-of-100 device maximizes the output range while staying within the output swing range. If the maximum calculated gains are slightly less than 100, the value of the current-sense resistor can be reduced to keep the output from hitting the output-swing limitations.

To calculate the accuracy at peak current, the two factors that must be determined are the gain error and the offset error. The gain error of the INAx181-Q1 is specified to be a maximum of 1%. The error due to the offset is constant, and is specified to be 500 µV (maximum) for the conditions where VCM = 12 V and VS = 5 V. Using Equation 7, the percentage error contribution of the offset voltage is calculated to be 2.5%, with total offset error = 500 µV, RSENSE = 1 mΩ, and ISENSE = 20 A.

Equation 7. INA181-Q1 INA2181-Q1 INA4181-Q1 offset_error_bos793.gif

One method of calculating the total error is to add the gain error to the percentage contribution of the offset error. However, in this case, the gain error and the offset error do not have an influence or correlation to each other. A more statistically accurate method of calculating the total error is to use the RSS sum of the errors, as shown in Equation 8:

Equation 8. INA181-Q1 INA2181-Q1 INA4181-Q1 eq2_sbos765.gif

After applying Equation 8, the total current sense error at maximum current is calculated to be 2.7%, and that is less than the design example requirement of 3.5%.

The INA181A3-Q1 (gain = 100) also has a bandwidth of 150 kHz that meets the small-signal bandwidth requirement of 100 kHz. If higher bandwidth is required, lower-gain devices can be used at the expense of either reduced output voltage range or an increased value of RSENSE.