SBOS644C February   2013  – March 2018 INA231

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      High-or Low-Side Sensing
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: I2C Bus
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Basic Analog-to-Digital Converter (ADC) Functions
        1. 8.3.1.1 Power Calculation
        2. 8.3.1.2 ALERT Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 Averaging and Conversion Time Considerations
    5. 8.5 Programming
      1. 8.5.1 Configure, Measure, and Calculate Example
      2. 8.5.2 Programming the Power Measurement Engine
        1. 8.5.2.1 Calibration Register and Scaling
      3. 8.5.3 Simple Current Shunt Monitor Usage (No Programming Necessary)
      4. 8.5.4 Default INA231 Settings
      5. 8.5.5 Writing to and Reading from the INA231
        1. 8.5.5.1 Bus Overview
          1. 8.5.5.1.1 Serial Bus Address
          2. 8.5.5.1.2 Serial Interface
        2. 8.5.5.2 High-Speed I2C Mode
      6. 8.5.6 SMBus Alert Response
    6. 8.6 Register Maps
      1. Table 3. Summary of Register Set
      2. 8.6.1     Configuration Register (00h, Read/Write)
        1. Table 4. Configuration Register (00h, Read/Write) Descriptions
        2. 8.6.1.1   AVG Bit Settings [11:9]
          1. Table 5. AVG Bit Settings [11:9] Description
        3. 8.6.1.2   VBUS CT Bit Settings [8:6]
          1. Table 6. VBUS CT Bit Settings [8:6] Description
        4. 8.6.1.3   VSH CT Bit Settings [5:3]
          1. Table 7. Register Description VSH CT Bit Settings [5:3]
        5. 8.6.1.4   Mode Settings [2:0]
          1. Table 8. Mode Settings [2:0]
      3. 8.6.2     Shunt Voltage Register (01h, Read-Only)
        1. Table 9. Shunt Voltage Register (01h, Read-Only) Description
      4. 8.6.3     Bus Voltage Register (02h, Read-Only)
        1. Table 10. Bus Voltage Register (02h, Read-Only) Description
      5. 8.6.4     Power Register (03h, Read-Only)
        1. Table 11. Power Register (03h, Read-Only) Description
      6. 8.6.5     Current Register (04h, Read-Only)
        1. Table 12. Current Register (04h, Read-Only) Description
      7. 8.6.6     Calibration Register (05h, Read/Write)
        1. Table 13. Calibration Register (05h, Read/Write) Description
      8. 8.6.7     Mask/Enable Register (06h, Read/Write)
        1. Table 14. Mask/Enable Register (06h, Read/Write) Description
      9. 8.6.8     Alert Limit Register (07h, Read/Write)
        1. Table 15. Alert Limit Register (07h, Read/Write) Description
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Filtering and Input Considerations
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YFF|12
  • YFD|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

at TA = 25°C, VS = 3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SHUNT INPUT
Shunt voltage input –81.92 81.9175 mV
CMR Common-mode rejection VIN+ = 0 V to 28 V 100 120 dB
VOS Shunt offset voltage, RTI(1) ±10 ±50 μV
TA = –40°C to +125°C 0.1 0.5 μV/°C
PSRR vs power supply VS = 2.7 V to 5.5 V 10 μV/V
BUS INPUT
Bus voltage input range(2) 0 28 V
VOS Bus offset voltage, RTI(1) ±5 ±30 mV
TA = –40°C to +125°C 10 40 μV/°C
PSRR vs power supply 2 mV/V
BUS pin input impedance 830
INPUT
IIN+, IIN- Input bias current 10 μA
Input leakage(3) (VIN+) + (VIN–), Power-Down mode 0.1 0.5 μA
DC ACCURACY
ADC native resolution 16 Bits
1 LSB step size Shunt voltage 2.5 μV
Bus voltage 1.25 mV
Shunt voltage gain error 0.2% 0.5%
TA = –40°C to +125°C 10 50 ppm/°C
Bus voltage gain error 0.2% 0.5%
TA = –40°C to +125°C 10 50 ppm/°C
Differential nonlinearity ±0.1 LSB
ADC conversion time CT bit = 000 140 154 μs
CT bit = 001 204 224 μs
CT bit = 010 332 365 μs
CT bit = 011 588 646 μs
CT bit = 100 1.1 1.21 ms
CT bit = 101 2.116 2.328 ms
CT bit = 110 4.156 4.572 ms
CT bit = 111 8.244 9.068 ms
SMBus
SMBus timeout(4) 28 35 ms
DIGITAL INPUT/OUTPUT
Input capacitance 3 pF
Leakage input current 0 ≤ VIN ≤ VS 0.5 2 μA
VIH High-level input voltage 1.4 6 V
VIL Low-level input voltage –0.5 0.4 V
VOL Low-level output voltage (SDA, ALERT) IOL = 3 mA 0 0.4 V
Hysteresis 500 mV
POWER SUPPLY
Quiescent current 330 420 μA
Power-Down mode 3 7 μA
Power-on reset threshold 2 V
RTI = Referred-to-input.
Although the input range is 28 V, the full-scale range of the ADC scaling is 40.96 V. Do not apply more than 28 V. See the Basic Analog-to-Digital Converter (ADC) Functions section for more details
Input leakage is positive (current flowing into the pin) for the conditions shown at the top of this table. Negative leakage currents can occur under different input conditions.
SMBus timeout in the INA231 resets the interface any time SCL is low for more than 28 ms.