SBOS956 December   2018 INA240-SEP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
      2.      Enhanced PWM Rejection
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Amplifier Input Signal
        1. 7.3.1.1 Enhanced PWM Rejection Operation
        2. 7.3.1.2 Input Signal Bandwidth
      2. 7.3.2 Selecting the Sense Resistor (RSENSE)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Adjusting the Output Midpoint With the Reference Pins
      2. 7.4.2 Reference Pin Connections for Unidirectional Current Measurements
        1. 7.4.2.1 Ground Referenced Output
        2. 7.4.2.2 VS Referenced Output
      3. 7.4.3 Reference Pin Connections for Bidirectional Current Measurements
        1. 7.4.3.1 Output Set to External Reference Voltage
        2. 7.4.3.2 Output Set to Midsupply Voltage
        3. 7.4.3.3 Output Set to Mid-External Reference
        4. 7.4.3.4 Output Set Using Resistor Divider
      4. 7.4.4 Calculating Total Error
        1. 7.4.4.1 Error Sources
        2. 7.4.4.2 Reference Voltage Rejection Ratio Error
          1. 7.4.4.2.1 Total Error Example 1
          2. 7.4.4.2.2 Total Error Example 2
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input Filtering
    2. 8.2 Typical Applications
      1. 8.2.1 Inline Motor Current-Sense Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Solenoid Drive Current-Sense Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Do's and Don'ts
      1. 8.3.1 High-Precision Applications
      2. 8.3.2 Kelvin Connection from the Current-Sense Resistor
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Decoupling
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Connection to the Current-Sense Resistor
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • VID V62/18615
  • Radiation Hardened
    • Single Event Latch-up (SEL) Immune to 43 MeV-cm2/mg at 125°C
    • ELDRS Free to 30 krad(Si)
    • Total Ionizing Dose (TID) RLAT for Every Wafer Lot up to 20 krad(Si)
  • Space Enhanced Plastic
    • Controlled Baseline
    • Gold Wire
    • NiPdAu Lead Finish
    • One Assembly and Test Site
    • One Fabrication Site
    • Available in Military (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
    • Enhanced Mold Compound for Low Outgassing
  • Enhanced PWM Rejection
  • Excellent CMRR: 132 dB (Typical)
    • Wide Common-Mode Range: –4 V to 80 V
    • Gain: 20 V/V:
      • Gain Error: 0.2% (Maximum)
      • Gain Drift: 2.5 ppm/°C (Maximum)
      • Offset Voltage: ±25 μV (Maximum)
      • Offset Drift: 250 nV/°C (Maximum)
      • Quiescent Current: 2.4 mA (Maximum)