SBOS554C March   2012  – January 2021 INA282-Q1 , INA283-Q1 , INA284-Q1 , INA285-Q1 , INA286-Q1


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Selecting RS
      2. 7.3.2 Effective Bandwidth
      3. 7.3.3 Transient Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Reference Pin Connection Options
        1. Unidirectional Operation
          1. Ground Referenced Output
          2. V+ Referenced Output
        2. Bidirectional Operation
          1. External Reference Output
          2. Splitting the Supply
          3. Splitting an External Reference
      2. 7.4.2 Shutdown
      3. 7.4.3 Extended Negative Common-Mode Range
      4. 7.4.4 Calculating Total Error
        1. Example 1 INA282-Q1
        2. Example 2 INA286-Q1
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Connections
    2. 8.2 Typical Applications
      1. 8.2.1 Current Summing
        1. Design Requirements
        2. Detailed Design Procedures
        3. Application Curve
      2. 8.2.2 Current Differencing
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
  12. 12Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Calculating Total Error

The electrical specifications for the INA28x-Q1 family of devices include the typical individual errors terms such as gain error, offset error, and nonlinearity error. Total error including all of these individual error components is not specified in Section 6.5. To accurately calculate the expected error of the device, the operating conditions of the device must first be known. Some current shunt monitors specify a total error in the product data sheet. However, this total error term is accurate under only one particular set of operating conditions. Specifying the total error at this one point has little practical value because any deviation from these specific operating conditions no longer yields the same total error value. This section discusses the individual error sources, with information on how to apply them to calculate the total error value for the device under any normal operating conditions.

The typical error sources that have the largest impact on the total error of the device are input offset voltage, common-mode rejection ratio, gain error, and nonlinearity error. For the INA28x-Q1, an additional error source referred to as reference voltage rejection ratio is also included in the total error value.

The nonlinearity error of the INA28x-Q1 is relatively low compared to the gain error specification. This low error results in a gain error that can be expected to be relatively constant throughout the linear input range of the device. While the gain error remains constant across the linear input range of the device, the error associated with the input offset voltage does not. As the differential input voltage developed across a shunt resistor at the input of the INA28x-Q1 decreases, the inherent input offset voltage of the device becomes a larger percentage of the measured input signal resulting in an increase in error in the measurement. This varying error is present among all current shunt monitors, given the input offset voltage ratio to the voltage being sensed by the device. The relatively low input offset voltages present in the INA28x-Q1 devices limit the amount of contribution the offset voltage has on the total error term.

The term reference voltage rejection ratio refers to the amount of error induced by applying a reference voltage to the INA28x-Q1 device that deviates from the inherent bias voltage present at the output of the first stage of the device. The output of the switched-capacitor network and first-stage amplifier has an inherent bias voltage of approximately 2.048 V. Applying a reference voltage of 2.048 V to the INA28x-Q1 reference pins results in no additional error term contribution. Applying a voltage to the reference pins that differs from 2.048 V creates a voltage potential in the internal difference amplifier, resulting in additional current flowing through the resistor network. As a result of resistor tolerances, this additional current flow causes additional error at the output because of resistor mismatches. Additionally, as a result of resistor tolerances, this additional current flow causes additional error at the output based on the common-mode rejection ratio of the output stage amplifier. This error term is referred back to the input of the device as additional input offset voltage. Increasing the difference between the 2.048-V internal bias and the external reference voltage results in a higher input offset voltage. Also, as the error at the output is referred back to the input, there is a larger impact on the input-referred offset, VOS, for the lower-gain versions of the device.

Two examples are provided that detail how different operating conditions can affect the total error calculations. Typical and maximum calculations are shown as well, to provide the user more information on how much error variance is present from device to device.