SBOS959C December   2018  – June 2020 INA819

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      INA819 Simplified Internal Schematic
      2.      Typical Distribution of Input Stage Offset Voltage Drift
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics: Table of Graphs
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Setting the Gain
        1. 8.3.1.1 Gain Drift
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Input Common-Mode Range
      4. 8.3.4 Input Protection
      5. 8.3.5 Operating Voltage
      6. 8.3.6 Error Sources
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reference Pin
      2. 9.1.2 Input Bias Current Return Path
    2. 9.2 Typical Applications
      1. 9.2.1 Three-Pin Programmable Logic Controller (PLC)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Resistance Temperature Detector Interface
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = ±15 V, RL = 10 kΩ, VREF = 0 V, and G = 1 (unless otherwise noted)
INA819 D001_SBOS959.gif
N = 1555 Mean = 4.71 µV Std. Dev. = 7.12 µV
Figure 1. Typical Distribution of Input Stage Offset Voltage
INA819 D003_SBOS959.gif
N = 1555 Mean = –3.18 µV Std. Dev. = 41.26 µV
Figure 3. Typical Distribution of Output Stage Offset Voltage
INA819 D005_SBOS959.gif
45 units, 1 wafer lot
Figure 5. Input Stage Offset Voltage vs Temperature
INA819 D006_SBOS959.gif
N = 94 Mean = 37.13 pA Std. Dev. = 57.65 pA
TA = 25°C
Figure 7. Typical Distribution of Input Bias Current
INA819 D008_SBOS959.gif
N = 94 Mean = –38.82 pA Std. Dev. = 47.24 pA
Figure 9. Typical Distribution of Input Offset Current
INA819 D010_SBOS959.gif
N = 94 G = 1
Figure 11. Input Offset Current vs Temperature
INA819 D012_SBOS959.gif
N = 94 Mean = 0.34 µV/V Std. Dev. = 0.54 µV/V
G = 10
Figure 13. Typical CMRR Distribution
INA819 D014_SBOS959.gif
5 typical units G = 10
Figure 15. CMRR vs Temperature
INA819 D016_SBOS959.gif
Figure 17. CMRR vs Frequency (RTI)
INA819 D018_SBOS959.gif
Figure 19. Positive PSRR vs Frequency (RTI)
INA819 D020_SBOS959.gif
Figure 21. Gain vs Frequency
INA819 D022_SBOS959.gif
Figure 23. Current Noise Spectral Density vs Frequency (RTI)
INA819 D024_SBOS959.gif
G = 1000
Figure 25. 0.1-Hz to 10-Hz RTI Voltage Noise
INA819 D026_SBOS959.gif
VS = ±15 V
Figure 27. Input Bias Current vs Common-Mode Voltage
INA819 D028_SBOS959.gif
N = 94 Mean = 286 ppm Std. Dev. = 204 ppm
G = 10
Figure 29. Typical Distribution of Gain Error, G = 10
INA819 D030_SBOS959.gif
G = 10
Figure 31. Gain Error vs Temperature
INA819 D032_SBOS959.gif
G = 1
Figure 33. Gain Nonlinearity
INA819 D034_SBOS959.gif
Figure 35. Offset Voltage vs Negative Common-Mode Voltage
INA819 D036_SBOS959.gif
Figure 37. Positive Output Voltage Swing vs Output Current
INA819 D038_SBOS959.gif
Figure 39. Short Circuit Current vs Temperature
INA819 D040_SBOS959.gif
500-kHz measurement bandwidth
1-VRMS output voltage 100-kΩ load
Figure 41. THD+N vs Frequency
INA819 D042_SBOS959.gif
G = 1 RL = 10 kΩ CL = 100 pF
Figure 43. Small-Signal Response
INA819 D044_SBOS959.gif
G = 100 RL = 10 kΩ CL = 100 pF
Figure 45. Small-Signal Response
INA819 D053_SBOS959.gif
Figure 47. Large Signal Step Response
INA819 D047_SBOS959.gif
Figure 49. Differential-Mode EMI Rejection Ratio
INA819 D054_SBOS959.gif
VS = 5 V G = 1
Figure 51. Input Common-Mode Voltage vs Output Voltage
INA819 D055_SBOS959.gif
VS = ±5 V VREF = 0 V
Figure 53. Input Common-Mode Voltage vs Output Voltage
INA819 D002_SBOS959.gif
N = 45 Mean = 0.0357 µV/°C Std. Dev. = 0.099 µV/°C
Figure 2. Typical Distribution of Input Stage Offset Voltage Drift
INA819 D004_SBOS959.gif
N = 45 Mean = –1.49 µV/°C Std. Dev. = 0.89 µV/°C
Figure 4. Typical Distribution of Output Stage Offset Voltage Drift
INA819 D051_SBOS959.gif
45 units, 1 wafer lots
Figure 6. Output Stage Offset Voltage vs Temperature
INA819 D007_SBOS959.gif
N = 94 Mean = –27.65 pA Std. Dev. = 52.58 pA
TA = 90°C
Figure 8. Typical Distribution of Input Bias Current
INA819 D009_SBOS959.gif
N = 94 G = 1
Figure 10. Input Bias Current vs Temperature
INA819 D011_SBOS959.gif
N = 94 Mean = 3.23 µV/V Std. Dev. = 5.38 µV/V
G = 1
Figure 12. Typical CMRR Distribution
INA819 D013_SBOS959.gif
5 typical units G = 1
Figure 14. CMRR vs Temperature
INA819 D015_SBOS959.gif
VS = 36 V
Figure 16. Input Current vs Input Overvoltage
INA819 D017_SBOS959.gif
1-kΩ source imbalance
Figure 18. CMRR vs Frequency (RTI)
INA819 D019_SBOS959.gif
Figure 20. Negative PSRR vs Frequency (RTI)
INA819 D021_SBOS959.gif
Figure 22. Voltage Noise Spectral Density vs Frequency (RTI)
INA819 D023_SBOS959.gif
G = 1
Figure 24. 0.1-Hz to 10-Hz RTI Voltage Noise
INA819 D025_SBOS959.gif
Figure 26. 0.1-Hz to 10-Hz RTI Current Noise
INA819 D027_SBOS959.gif
N = 94 Mean = –48 ppm Std. Dev. = 58 ppm
G = 1
Figure 28. Typical Distribution of Gain Error, G = 1
INA819 D029_SBOS959.gif
G = 1
Figure 30. Gain Error vs Temperature
INA819 D031_SBOS959.gif
Figure 32. Supply Current vs Temperature
INA819 D033_SBOS959.gif
G = 10
Figure 34. Gain Nonlinearity
INA819 D035_SBOS959.gif
Figure 36. Offset Voltage vs Positive Common-Mode Voltage
INA819 D037_SBOS959.gif
Figure 38. Negative Output Voltage Swing vs Output Current
INA819 D039_SBOS959.gif
Figure 40. Large-Signal Frequency Response
INA819 D041_SBOS959.gif
Figure 42. Overshoot vs Capacitive Loads
INA819 D043_SBOS959.gif
G = 10 RL = 10 kΩ CL = 100 pF
Figure 44. Small-Signal Response
INA819 D045_SBOS959.gif
G = 1000 RL = 10 kΩ CL = 100 pF
Figure 46. Small-Signal Response
INA819 D046_SBOS959.gif
Figure 48. Closed-Loop Output Impedance
INA819 D048_SBOS959.gif
Figure 50. Common-Mode EMI Rejection Ratio
INA819 D056_SBOS959.gif
VS = 5 V G = 100
Figure 52. Input Common-Mode Voltage vs Output Voltage
INA819 D052_SBOS959.gif
VS = ±15 V VREF = 0 V
Figure 54. Input Common-Mode Voltage vs Output Voltage