SLLSEY7F June   2017  – April 2020 ISO1211 , ISO1212

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.          Application Diagram
      2.      ISO121x Devices Reduce Board Temperatures vs Traditional Solutions
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—DC Specification
    10. 6.10 Switching Characteristics—AC Specification
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Sinking Inputs
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Setting Current Limit and Voltage Thresholds
          2. 9.2.1.2.2 Thermal Considerations
          3. 9.2.1.2.3 Designing for 48-V Systems
          4. 9.2.1.2.4 Designing for Input Voltages Greater Than 60 V
          5. 9.2.1.2.5 Surge, ESD, and EFT Tests
          6. 9.2.1.2.6 Multiplexing the Interface to the Host Controller
          7. 9.2.1.2.7 Status LEDs
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Sourcing Inputs
      3. 9.2.3 Sourcing and Sinking Inputs (Bidirectional Inputs)
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from E Revision (August 2018) to F Revision

  • Changed VDE standard name From: DIN V VDE V 0884-10 To: DIN VDE V 0884-11 throughout the documentGo
  • Changed Features bullet From: "CSA, CQC, TUV Certificates Available" To: "IEC 60950-1, IEC 62368-1, IEC 61010-1 and GB 4943.1-2011 certifications" Go
  • Updated Applications listGo
  • Changed ISO1211 'SUB' pin description text From: "Leave this pin unconnected on the board" To: "For good thermal performance, it is recommended to connect this pin to a small 2 mm x 2 mm floating plane on the board. Do not connect this floating plane to FGND or any other signal or plane." in Pin Functions table Go
  • Changed ISO1212 'SUB1' and 'SUB2' pins description text From: "Leave this pin unconnected on the board" To: "For good thermal performance, it is recommended to connect this pin to a small 2 mm x 2 mm floating plane on the board. Do not connect this floating plane to FGND1, FGND2, SUBx or any other signal or plane." in Pin Functions table Go
  • Updated certification information in Safety-Related Certifications tableGo

Changes from D Revision (March 2018) to E Revision

  • Changed VIH and VIH to VIL and VIH in the RTHR resistor description in the Setting Current Limit and Voltage Thresholds sectionGo

Changes from C Revision (February 2018) to D Revision

  • Updated the Features and Applications sections. Added a new TI TechNote reference to the Description and Related Documentation section.Go
  • Changed the unit for CPG from µm to mm in the Insulation Specifications tableGo
  • Changed the Functional Block DiagramGo
  • Changed VIL from min to typ in the VIL equationGo
  • Added the Designing for Input Voltages Greater Than 60 V sectionGo
  • Added the bidirectional implementation example to the Sourcing and Sinking Inputs sectionGo

Changes from B Revision (September 2017) to C Revision

  • Added wire-break detection to the Features sectionGo
  • Added the enable pin to mutiplex output signals to the Features sectionGo
  • Changed RTHR = 5 kΩ to 4 kΩ in the High-Level Voltage Transition Threshold vs Ambient Temperature graphGo
  • Changed the Type 1 RTH value from 3 kΩ to 2.5 kΩ in the Surge, IEC ESD and EFT tableGo

Changes from A Revision (September 2017) to B Revision

  • Changed the status from Advance Information to Production DataGo