SLLS629L January   2006  – October 2015 ISO721 , ISO721M , ISO722 , ISO722M

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics, 5 V
    6. 7.6  Electrical Characteristics, 5 V, 3.3 V
    7. 7.7  Electrical Characteristics, 3.3 V, 5 V
    8. 7.8  Electrical Characteristics, 3.3 V
    9. 7.9  Power Dissipation
    10. 7.10 Switching Characteristics, 5 V
    11. 7.11 Switching Characteristics, 5 V, 3.3 V
    12. 7.12 Switching Characteristics, 3.3 V, 5 V
    13. 7.13 Switching Characteristics, 3.3 V
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Features Description
      1. 9.3.1 Insulation Characteristics
      2. 9.3.2 IEC 60664-1 Ratings Table
      3. 9.3.3 Regulatory Information
      4. 9.3.4 Package Insulation Characteristics
      5. 9.3.5 Safety Limiting Values
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematic
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Parameter Measurement Information

ISO721 ISO721M ISO722 ISO722M switch_char_lls629.gif Figure 10. Switching Characteristic Test Circuit and Voltage Waveforms
ISO721 ISO721M ISO722 ISO722M sleep_high_lls629.gif Figure 11. ISO722 Sleep-Mode High-Level Output Test Circuit and Voltage Waveforms
ISO721 ISO721M ISO722 ISO722M sleep_low_lls629.gif Figure 12. ISO722 Sleep-Mode Low-Level Output Test Circuit and Voltage Waveforms

NOTE

A: The input pulse is supplied by a generator having the following characteristics:

PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.

B: CL = 15 pF ± 20% and includes instrumentation and fixture capacitance.
ISO721 ISO721M ISO722 ISO722M fail_cir_lls629.gif
NOTE: VI transition time is 100 ns.
Figure 13. Failsafe Delay Time Test Circuit and Voltage Waveforms
ISO721 ISO721M ISO722 ISO722M com_mode_cir_lls629.gif
NOTE: Pass/fail criterion is no change in VO.
Figure 14. Common-Mode Transient-Immunity Test Circuit and Voltage Waveform
ISO721 ISO721M ISO722 ISO722M eye_pattern_lls629.gif
NOTE: Bit pattern run length is 216 – 1. Transition time is 800 ps. NRZ data input has no more than five consecutive 1s or 0s.
Figure 15. Peak-to-Peak Eye-Pattern Jitter Test Circuit and Voltage Waveform