SLLSEA5C March   2012  – March 2019 ISO7421E-Q1


  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Pin Configuration and Functions
    1. Table 1. Pin Functions
  5. Electrostatic Discharge Caution
    1.     Device Images
      1. 5.1 Device Function Table
      2. 5.2 Available Options
  6. Absolute Maximum Ratings
  7. Thermal Information
  8. Recommended Operating Conditions
  9. Electrical Characteristics
  10. 10Switching Characteristics
  11. 11Electrical Characteristics
  12. 12Switching Characteristics
  13. 13Electrical Characteristics
  14. 14Switching Characteristics
  15. 15Electrical Characteristics
  16. 16Switching Characteristics
  17. 17Parameter Measurement Information
  18. 18Device Information
    1. 18.1 Package Characteristics
    2. 18.2 IEC 60664-1 Ratings Table
    3. 18.3 Insulation Characteristics
    4. 18.4 Regulatory Information
    5. 18.5 IEC Safety Limiting Values
    6. 18.6 Equivalent Input And Output Schematic Diagrams
  19. 19Typical Characteristics
  20. 20Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

IEC Safety Limiting Values

Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures.

Is Safety input, output, or supply current θJA =212°C/W, VI = 5.5 V, TJ = 170°C, TA = 25°C 112 mA
θJA =212°C/W, VI = 3.6 V, TJ = 170°C, TA = 25°C 171
Ts Maximum Case Temperature 150 °C

The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Characteristics table is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.

ISO7421E-Q1 IEC_lilit_llse39.gifFigure 4. DW-16 Theta-JC Thermal Derating Curve per IEC 60747-5-2
ISO7421E-Q1 typ_app_llsea5.gifFigure 5. Typical ISO7421E-Q1 Application Circuit