The I2C interface of the LDC is designed to operate with the standard I2C transactions detailed in the I2C specification; however it is not suitable for use in an I2C system which supports early termination of transactions. A STOP condition or other early termination occurring before the normal end of a transaction (ACK) is not supported and may corrupt that transaction and/or the following transaction. The device is also sensitive to any (extraneous) pulse on SDA during the SCL low period of the first bit position of the i2c_address byte. To ensure proper LDC operation, the master device should not transmit this type of waveform. An example of an unsupported I2C waveform is shown in Figure 13. Any such pulses should not have a duration which exceeds the device tSP specification.