SNOS412Q February   2000  – January 2023 LM1117

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 LM1117 Electrical Characteristics
    6. 7.6 LM1117I Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Load Regulation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Protection Diodes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Capacitors
          1. 9.2.2.1.1 Input Bypass Capacitor
          2. 9.2.2.1.2 Adjust Terminal Bypass Capacitor
          3. 9.2.2.1.3 Output Capacitor
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
        1. 9.5.1.1 Heat Sink Requirements
      2. 9.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Load Regulation

The LM1117 regulates the voltage that appears between the output and ground pins, or between the output and adjust pins. In some cases, line resistances can introduce errors to the voltage across the load. To obtain the best load regulation, a few precautions are needed.

Figure 8-2 illustrates a typical application using a fixed output regulator. The Rt1 and Rt2 are the line resistances. Obviously the VLOAD is less than the VOUT by the sum of the voltage drops along the line resistances. In this case, the load regulation at the RLOAD is degraded from the data sheet specification. To improve this degradation, the load must be tied directly to the output terminal on the positive side and directly tied to the ground terminal on the negative side.

GUID-3F962437-4F77-4A99-A1C3-A4EEDDD3F516-low.pngFigure 8-2 Typical Application Using Fixed Output Regulator

When the adjustable regulator is used (Figure 8-3), the best performance is obtained with the positive side of the resistor R1 tied directly to the output terminal of the regulator rather than near the load. This eliminates line drops from appearing effectively in series with the reference and degrading regulation. For example, a 5-V regulator with 0.05-Ω resistance between the regulator and load has a load regulation resulting from the line resistance of 0.05 Ω × IL. If R1 (= 125 Ω) is connected near the load, the effective line resistance is 0.05 Ω (1 + R2 / R1) or in this case, four times worse. In addition, the ground side of the resistor R2 can be returned near the ground of the load to provide remote ground sensing and improve load regulation.

GUID-1457CE90-3CCA-4FDC-B91B-5CA8F4091519-low.pngFigure 8-3 Best Load Regulation Using Adjustable Output Regulator