SNVS953G December 2012 – May 2021 LM25018
Input capacitor must be large enough to limit the input voltage ripple, which is calculated using Equation 17.
Choosing a ΔVIN = 0.5 V gives a minimum CIN = 0.34 μF. A standard value of 1 μF is selected for CIN = C4 . The input capacitor must be rated for the maximum input voltage under all conditions. A 50-V, X7R dielectric must be selected for this design.
Input capacitor must be placed directly across VIN and RTN (pin 2 and 1) of the IC. If it is not possible to place all of the input capacitor close to the IC, a 0.1-μF capacitor must be placed near the IC to provide a bypass path for the high frequency component of the switching current. This helps limit the switching noise.