SNVS540K March   2009  – April 2019 LM2840 , LM2841 , LM2842

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Circuit
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conduction Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Bootstrap Capacitor
        7. 8.2.2.7 Soft-Start Components
        8. 8.2.2.8 Shutdown Operation
        9. 8.2.2.9 Schottky Diode
      3. 8.2.3 Application Curves
      4. 8.2.4 Other Application Circuits
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

DDC Package
6-Pin SOT
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 CB I SW FET gate bias voltage. Connect CBOOT capacitor between CB and SW.
2 GND Ground connection
3 FB I Feedback pin: Set feedback voltage divider ratio with VOUT = VFB (1 + (R1 / R2)). Resistors must be from 100 Ω to 10 kΩ to avoid input bias errors.
4 SHDN I Logic level shutdown input. Pull to GND to disable the device and pull high to enable the device. If this function is not used tie to VIN . DO NOT ALLOW TO FLOAT.
5 VIN I Power input voltage pin: 4.5-V to 42-V normal operating range.
6 SW O Power FET output: Connect to inductor, diode, and CBOOT capacitor.