SNVSAX8 April   2018 LM3478Q-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical High Efficiency Step-Up (Boost) Converter
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings - LM3478Q-Q1
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage Protection
      2. 7.3.2 Slope Compensation Ramp
      3. 7.3.3 Frequency Adjust/Shutdown
      4. 7.3.4 Short-Circuit Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical High Efficiency Step-Up (Boost) Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH Tools
          2. 8.2.1.2.2  Power Inductor Selection
          3. 8.2.1.2.3  Programming the Output Voltage
          4. 8.2.1.2.4  Setting the Current Limit
          5. 8.2.1.2.5  Current Limit with External Slope Compensation
          6. 8.2.1.2.6  Power Diode Selection
          7. 8.2.1.2.7  Power MOSFET Selection
          8. 8.2.1.2.8  Input Capacitor Selection
          9. 8.2.1.2.9  Output Capacitor Selection
          10. 8.2.1.2.10 Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Power MOSFET Selection
          2. 8.2.2.2.2 Power Diode Selection
          3. 8.2.2.2.3 Selection of Inductors L1 and L2
          4. 8.2.2.2.4 Sense Resistor Selection
          5. 8.2.2.2.5 Sepic Capacitor Selection
          6. 8.2.2.2.6 Input Capacitor Selection
          7. 8.2.2.2.7 Output Capacitor Selection
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Custom Design with WEBENCH Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Documentation Support
      1. 11.3.1 Related Documentation
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Unless otherwise specified, VIN = 12V, RFA = 40kΩ, TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VFB Feedback Voltage VCOMP = 1.4V, 2.97 ≤ VIN ≤ 40V 1.2416 1.26 1.2843 V
VCOMP = 1.4V, 2.97 ≤ VIN ≤ 40V, −40°C ≤ TJ ≤ 125°C 1.228 1.292
ΔVLINE Feedback Voltage Line Regulation 2.97 ≤ VIN ≤ 40V 0.001 %/V
ΔVLOAD Output Voltage Load Regulation IEAO Source/Sink ±0.5 %/A
VUVLO Input Undervoltage Lock-out 2.85   V
−40°C ≤ TJ ≤ 125°C 2.97
VUV(HYS) Input Undervoltage Lock-out Hysteresis 170   mV
−40°C ≤ TJ ≤ 125°C 130 210
Fnom Nominal Switching Frequency RFA = 40KΩ 400   kHz
RFA = 40KΩ, −40°C ≤ TJ ≤ 125°C 350 440
RDS1 (ON) Driver Switch On Resistance (top) IDR = 0.2A, VIN= 5V 16 Ω
RDS2 (ON) Driver Switch On Resistance (bottom) IDR = 0.2A 4.5
VDR (max) Maximum Drive Voltage Swing(2) VIN< 7.2V VIN V
VIN ≥ 7.2V 7.2
Dmax Maximum Duty Cycle(3) 100%
Tmin (on) Minimum On Time 325   ns
−40°C ≤ TJ ≤ 125°C 210 600
ISUPPLY Supply Current (non-switching) See (5) 2.7   mA
See (5), −40°C ≤ TJ ≤ 125°C 3.3
IQ Quiescent Current in Shutdown Mode VFA/SD = 5V (6), VIN = 5V 5   µA
VFA/SD = 5V (6), VIN = 5V, −40°C ≤ TJ ≤ 125°C 10
VSENSE Current Sense Threshold Voltage VIN = 5V 135 156 180 mV
VIN = 5V, −40°C ≤ TJ ≤ 125°C 125 190
VSC Short-Circuit Current Limit Sense Voltage VIN = 5V 343 mV
VIN = 5V, −40°C ≤ TJ ≤ 125°C 250 415
VSL Internal Compensation Ramp Voltage VIN = 5V 92   mV
VIN = 5V, −40°C ≤ TJ ≤ 125°C 52 132
VSL ratio VSL/VSENSE 0.30 0.49 0.70
VOVP Output Over-voltage Protection (with respect to feedback voltage) (4) VCOMP = 1.4V 32 50 mV
VCOMP = 1.4V, −40°C ≤ TJ ≤ 125°C 25
VSSOP Package 78
VSSOP Package, −40°C ≤ TJ ≤ 125°C 85
VOVP(HYS) Output Over-Voltage Protection Hysteresis(4) VCOMP = 1.4V 60   mV
VCOMP = 1.4V, −40°C ≤ TJ ≤ 125°C 20 110
Gm Error Amplifier Transconductance VCOMP = 1.4V, IEAO = 100µA (Source/Sink) 600 800 1000 µS
VCOMP = 1.4V, IEAO = 100µA (Source/Sink), −40°C ≤ TJ ≤ 125°C 365 1265
AVOL Error Amplifier Voltage Gain VCOMP = 1.4V, IEAO = 100µA (Source/Sink) 38   V/V
VCOMP = 1.4V, IEAO = 100µA (Source/Sink), −40°C ≤ TJ ≤ 125°C 26 44
IEAO Error Amplifier Output Current (Source/ Sink) Source, VCOMP = 1.4V, VFB = 0V 80 110  140 µA
Source, VCOMP = 1.4V, VFB = 0V, −40°C ≤ TJ ≤ 125°C 50 180
Sink, VCOMP = 1.4V, VFB = 1.4V −100 −140 −180 µA
Sink, VCOMP = 1.4V, VFB = 1.4V, −40°C ≤ TJ ≤ 125°C −85 −185
VEAO Error Amplifier Output Voltage Swing Upper Limit, VFB = 0V, COMP Pin = Floating 2.2   V
Upper Limit, VFB = 0V, COMP Pin = Floating, −40°C ≤ TJ ≤ 125°C 1.8 2.4
Lower Limit, VFB = 1.4V 0.56   V
Lower Limit, VFB = 1.4V, −40°C ≤ TJ ≤ 125°C 0.2 1.0
TSS Internal Soft-Start Delay VFB = 1.2V, VCOMP = Floating 4 ms
Tr Drive Pin Rise Time Cgs = 3000pf, VDR = 0 to 3V 25 ns
Tf Drive Pin Fall Time Cgs = 3000pf, VDR = 0 to 3V 25 ns
VSD Shutdown threshold (1) Output = High 1.27 V
Output = High, −40°C ≤ TJ ≤ 125°C 1.4
Output = Low 0.65 V
Output = Low, −40°C ≤ TJ ≤ 125°C 0.3
ISD Shutdown Pin Current VSD = 5V −1 µA
VSD = 0V +1
IFB Feedback Pin Current 15 nA
TSD Thermal Shutdown 165 °C
Tsh Thermal Shutdown Hysteresis 10 °C
(1) The FA/SD pin should be pulled to VIN through a resistor to turn the regulator off. The voltage on the FA/SD pin must be above the maximum limit for Output = High to keep the regulator off and must be below the limit for Output = Low to keep the regulator on.
(2) The voltage on the drive pin, VDR is equal to the input voltage when input voltage is less than 7.2 V. VDR is equal to 7.2 V when the input voltage is greater than or equal to 7.2 V.
(3) The limits for the maximum duty cycle can not be specified since the part does not permit less than 100% maximum duty cycle operation.
(4) The over-voltage protection is specified with respect to the feedback voltage. This is because the over-voltage protection tracks the feedback voltage. The overvoltage protection threshold is given by adding the feedback voltage, VFB to the over-voltage protection specification.
(5) For this test, the FA/SD pin is pulled to ground using a 40-K resistor.
(6) For this test, the FA/SD pin is pulled to 5 V using a 40-K resistor.