SNVSB97A December 2018 – September 2021 LM34936-Q1
The UVLO resistor divider must be designed for turnon below 6 V. Selecting a RUV2 = 249 kΩ gives a UVLO hysteresis of 0.8 V based on Equation 2. The lower UVLO resistor is the selected using Equation 24:
A standard value of 59.0 kΩ is selected for RUV1.
When programming the UVLO threshold for lower input voltage operation, it is important to choose MOSFETs with gate (Miller) plateau voltage lower than the minimum VIN.