SBOS944D September   2018  – September 2019 LM321LV , LM324LV , LM358LV

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Single-Pole, Low-Pass Filter
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions: LM321LV
    2.     Pin Functions: LM358LV
    3.     Pin Functions: LM324LV
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: LM321LV
    5. 6.5 Thermal Information: LM358LV
    6. 6.6 Thermal Information: LM324LV
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Common-Mode Input Range Includes Ground
      3. 7.3.3 Overload Recovery
      4. 7.3.4 Electrical Overstress
      5. 7.3.5 EMI Susceptibility and Input Filtering
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
    1. 9.1 Input and ESD Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

For VS = (V+) – (V–) = 2.7 V to 5.5 V (±1.35 V to ±2.75 V), TA = 25°C, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VS = 5 V ±1 ±3 mV
VS = 5 V, TA = –40°C to 125°C ±5
dVOS/dT VOS vs temperature TA = –40°C to 125°C ±4 µV/°C
PSRR Power-supply rejection ratio VS = 2.7 V to 5.5 V, VCM = (V–) 80 100 dB
INPUT VOLTAGE RANGE
VCM Common-mode voltage range No phase reversal (V–) – 0.1 (V+) – 1 V
CMRR Common-mode rejection ratio VS = 2.7 V, (V–) – 0.1 V < VCM < (V+) – 1 V,
TA = –40°C to 125°C
84 dB
VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) – 1 V,
TA = –40°C to 125°C
63 92
INPUT BIAS CURRENT
IB Input bias current VS = 5 V ±15 pA
IOS Input offset current ±5 pA
NOISE
En Input voltage noise (peak-to-peak) ƒ = 0.1 Hz to 10 Hz, VS = 5 V 5.1 µVPP
en Input voltage noise density ƒ = 1 kHz, VS = 5 V 40 nV/√Hz
INPUT CAPACITANCE
CID Differential 2 pF
CIC Common-mode 5.5 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 2.7 V, (V–) + 0.15 V < VO < (V+) – 0.15 V, RL = 2 kΩ 110 dB
VS = 5.5 V, (V–) + 0.15 V < VO < (V+) – 0.15 V, RL = 2 kΩ 125
FREQUENCY RESPONSE
GBW Gain-bandwidth product VS = 5 V 1 MHz
φm Phase margin VS = 5.5 V, G = 1 75 °
SR Slew rate VS = 5 V 1.5 V/µs
tS Settling time To 0.1%, VS = 5 V, 2-V step, G = 1, CL = 100 pF 4 µs
To 0.01%, VS = 5 V, 2-V step, G = 1, CL = 100 pF 5
tOR Overload recovery time VS = 5 V, VIN × gain > VS 1 µs
THD+N Total harmonic distortion + noise VS = 5.5 V, VCM = 2.5 V, VO = 1 VRMS, G = 1, f = 1 kHz,
80-kHz measurement BW
0.005%
OUTPUT
VOH Voltage output swing from positive supply RL ≥ 2 kΩ, TA = –40°C to 125°C 1 V
VOL Voltage output swing from negative supply RL ≤ 10 kΩ, TA = –40°C to 125°C 40 75 mV
ISC Short-circuit current VS = 5.5 V ±40 mA
ZO Open-loop output impedance VS = 5 V, f = 1 MHz 1200 Ω
POWER SUPPLY
VS Specified voltage range 2.7 (±1.35) 5.5 (±2.75) V
IQ Quiescent current per amplifier IO = 0 mA, VS = 5.5 V 90 150 µA
IO = 0 mA, VS = 5.5 V, TA = –40°C to 125°C 160