SNVSB29C October 2018 – June 2021 LM5143-Q1
Figure 9-4 shows the schematic diagram of a dual-output synchronous buck regulator with output voltages setpoints of 3.3 V and 5 V and a rated load current of 7 A for each output. In this example, the target half-load and full-load efficiencies are 91% and 90%, respectively, based on a nominal input voltage of 12 V that ranges from 3.5 V to 36 V. The switching frequency is set at 2.1 MHz by resistor RRT. The 5-V output is connected to VCCX to reduce IC bias power dissipation and improve efficiency.
This and subsequent design examples are provided herein to showcase the LM5143-Q1 controller in several different applications. Depending on the source impedance of the input supply bus, an electrolytic capacitor can be required at the input to ensure stability, particularly at low input voltage and high output current operating conditions. See Section 10 for more details.