SNVSB29C October   2018  – June 2021

PRODUCTION DATA

1. Features
2. Applications
3. Description
4. Revision History
5. Description (continued)
6. Pin Configuration and Functions
7. Specifications
8. Detailed Description
1. 8.1 Overview
2. 8.2 Functional Block Diagram
3. 8.3 Feature Description
4. 8.4 Device Functional Modes
9. Application and Implementation
1. 9.1 Application Information
1. 9.1.1 Power Train Components
2. 9.1.2 Error Amplifier and Compensation
2. 9.2 Typical Applications
1. 9.2.1 Design 1 – High Efficiency, Dual-Output Buck Regulator for Automotive Applications
2. 9.2.2 Design 2 – Two-Phase, Single-Output Buck Regulator for Automotive ADAS Applications
10. 10Power Supply Recommendations
11. 11Layout
1. 11.1 Layout Guidelines
2. 11.2 Layout Example
12. 12Device and Documentation Support
1. 12.1 Device Support
2. 12.2 Documentation Support
1. 12.2.1 Related Documentation
4. 12.4 Support Resources
6. 12.6 Electrostatic Discharge Caution
7. 12.7 Glossary
13. 13Mechanical, Packaging, and Orderable Information

• RWG|40

### 8.3.5 Switching Frequency (RT)

The LM5143-Q1 oscillator is programmed by a resistor between RT and AGND to set an oscillator frequency between 100 kHz to 2.2 MHz. CLK1 is the clock for channel 1 and CLK2 is for channel 2. CLK1 and CLK2 are 180° out of phase. Use Equation 1 to calculate the RT resistance for a given switching frequency.

Equation 1.

Under low VIN conditions when either of the on-time of the high-side MOSFETs exceeds the programmed oscillator period, the LM5143-Q1 extends the switching period of that channel until the PWM latch is reset by the current sense ramp exceeding the controller compensation voltage. In such an event, the oscillators (CLK1 and CLK2) operate independently and asynchronously until both channels can maintain output regulation at the programmed frequency.

The approximate input voltage level where this occurs is given by Equation 2.

Equation 2.

where

• where tSW is the switching period
• tOFF(min) is the minimum off-time of 60 ns