The practical duty cycle is greater than the estimated due to voltage drops across the MOSFET and sense resistor. The estimated duty cycle is calculated as shown in Equation 10.
When designing boost converters, the maximum required duty cycle must be reviewed at the minimum supply voltage. The minimum input supply voltage that can achieve the target output voltage is limited by the maximum duty cycle limit, and it can be estimated as follows:
The minimum input supply voltage can be further decreased by supplying fSYNC which is less than fRT. Practical DMAX is DMAX1 or DMAX2, whichever is lower.