SNVSBJ0B December 2019 – August 2021 LM5170
PRODUCTION DATA
Refer to Figure 8-7 for the following:
When the LM5170 is enabled, CRAMP1/2 is charged by the VINX pin through RRAMP1/2 at the beginning of each switching cycle. The internal pulldown FET discharges CRAMP1/2 at the end of the cycle within a 200-ns internal. Then the pulldown is released, and CRAMP1/2 repeats the charging and discharging cycles. In general, the RAMP RC time constant is much greater than the period of a switching cycle. Therefore, the RAMP pin voltages are sawtooth signals with a slope proportional to the HV-Port voltage. This way, the RAMP signals convey the line voltage info. Being directly used by the PWM comparators to determine the instantaneous switching duty cycles, the RAMP signals fulfill the line voltage feedforward function and enable the LM5170 to have a fast response to line transients.
TI recommends you to select appropriate RRAMP and CRAMP values by the following equation such that the RAMP pins reach the peak value of approximately 5 V each cycle when VIN is at 48 V.
For instance, if Fsw = 100 kHz and CRAMP1 = CRAMP2 = 1 nF, a resistor of approximately 96 kΩ must be selected for RRAMP1 and RRAMP2.
Because CRAMP1/2 must be fully discharged every cycle through the 15-Ω channel resistor of the pulldown FET within the 150-ns minimum discharging interval, CRAMP1/2 must be limited to be less than 2.5 nF nominal at room temperature.
There is also a valid RAMP signal detection circuit for each channel to prevent the channel from errantly running into the maximum duty cycle if RAMP goes away. It detects the peak voltage of the RAMP signal. If the peak voltage is less than 0.6 V in consecutive cycles, it is considered an invalid RAMP and the channel stops switching by turning both HO and LO off until the RAMP signal recovers. This 0.6-V voltage threshold defines the minimum operating voltage of the HV-Port to be approximately 5.76 V.