SNVSBJ0A December 2019 – June 2020 LM5170
The LM5170 accepts the current setting command in the form of either an analog voltage or a PWM signal. The analog voltage uses the ISETA pin, and the PWM signal uses the ISETD pin. There is an internal ISETD decoder that converts the PWM duty ratio at the ISETD pin to an analog voltage at the ISETA pin. Owing to possible ground noise impact, TI recommends users to remove EN1 signal to achieve no load (0 A).
Figure 21 and Figure 22 show the pin configurations for current programming with an analog voltage or a PWM signal. The channel DC current is expressed in terms of resulted differential current sense voltage VCS_dc. When ISETA is used, the ISETD pin can be left open or connected to AGND. When ISETD is used, place a ceramic capacitor CISETA between the ISETA pin and AGND. CISETA and the internal 100-kΩ at the output of the ISETD decoder forms a low-pass RC filter to attenuate the ripple voltage on ISETA. However, the RC filter delays the ISETD dynamic change to be reflected on ISETA. To limit the delay not to exceed Tdelay_ISETD, the time constant of the RC filter should satisfy Equation 1.
Therefore, the maximum CISETA should be determined by Equation 2:
On the other hand, the time constant of the RC filter should be big enough for effective filtering. To attenuate the ripple by 40 dB, the RC filter corner frequency should be at least two decade below FISETD, that is, Equation 3
Therefore the minimum ISETD signal frequency should be determined by Equation 4:
For instance, if ISETA is required to settle down to the steady-state in 1 ms following an ISETD duty ratio step change, namely Tdelay_ISETD < 1 ms, the user should select CISETA < 2.5 nF, and FISETD > 64 kHz. If Tdelay_ISETD < 0.1 ms, then CISETA < 250 pF, and FISETD> 640 kHz. Note that the feedback loop property causes additional delay for the actual current to settle to the new regulation level.
The ISETA pin is directly connected to the noninverting input of the error amplifier. By ISETA programming, the channel DC current is determined by Equation 5:
Or by Equation 6:
Or by Equation 7:
When using ISETD, the produced VISETA by the internal decoder is equal to the product of the effective duty ratio of the ISETD PWM signal (DISETD) and the 3.125-V internal reference voltage. The channel current is determined by Equation 8:
Or by Equation 9:
Or by Equation 10: