SNVSBJ0A December 2019 – June 2020 LM5170
To control the current setting by an analog voltage, ground the ISETD pin. To control the current setting by a PWM signal, there are two options to choose.
The first option is to use the built-in ISETD-to-ISETA decoder as shown in Figure 22. The PWM duty cycle to ISETA voltage conversion ratio satisfies Equation 8. The selection of CISETA and FISETD should be constrained by Equation 1 and Equation 4. The advantages of this option include convenience and current control accuracy. The drawback is the delay it may cause.
Another option is to use an external two-stage RC filter to convert the PWM ISETD signal to a DC voltage feeding the ISETA pin as shown in Figure 60. To achieve the same ISETA ripple voltage, this option only requires CISETA =1.5 nF, and the delay time of this two-stage filter is only 10% of the built-in decoder, or 15 µs versus the built-in decoder’s 150 µs. The drawback of this option is the conversion errors if the PWM signal voltage levels are not well regulated. This option is more suitable for operation under a closed digital outer voltage loop because the ISETD to ISETA conversion error can be readily compensated by the closed outer voltage loop.