To allow optimization of EMI with respect to efficiency, the LM6x4xx-Q1 is designed to allow a resistor to select the strength of the high-side FET driver during turn-on. See Figure 8-10. The current drawn through the RBOOT pin (the dotted loop) is magnified and drawn through from CBOOT (the dashed line). This current is used to turn on the high-side power MOSEFT.
Rise time is rapid with RBOOT short circuited to CBOOT. In this condition SW node harmonics roll off at -20 dBµV per decade until around 150 MHz where the harmonics begin rolling off at -40 dBµV per decade. Slowing the rise time decreases the frequency where this transition occurs which provides more rolloff in the higher frequencies which provides more margin on EMI scans. If CBOOT and RBOOT are connected through 700 Ω, slew time due to high-side turnon is limited to no more than 13 ns. 10 ns is typical when converting 13.5 V to 5 V. This slow rise time allows energy in SW node harmonics to roll off near 50 MHz under most conditions. Rolling off harmonics eliminates the need for shielding and common mode chokes in many applications. Note that rise time increases with increasing input voltage. Noise due to stored charge is also greatly reduced with higher RBOOT resistance. Switching with a slower slew rate decreases efficiency. Take care to optimize the resistance to provide the best EMI while not generating too much heat. If RBOOT is left open, rise time is set to its maximum value.