SNVSBP3B May   2020  – June 2021 LM62435-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Systems Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  EN Uses for Enable and VIN UVLO
      2. 8.3.2  MODE/SYNC Pin Operation
        1. 8.3.2.1 Level-Dependent MODE/SYNC Pin Control
        2. 8.3.2.2 Pulse-Dependent MODE/SYNC Pin Control
        3. 8.3.2.3 Clock Locking
      3. 8.3.3  PGOOD Output Operation
      4. 8.3.4  Internal LDO, VCC UVLO, and BIAS Input
      5. 8.3.5  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      6. 8.3.6  Adjustable SW Node Slew Rate
      7. 8.3.7  Spread Spectrum
      8. 8.3.8  Soft Start and Recovery From Dropout
      9. 8.3.9  Output Voltage Setting
      10. 8.3.10 Overcurrent and Short Circuit Protection
      11. 8.3.11 Thermal Shutdown
      12. 8.3.12 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 CCM Mode
        2. 8.4.3.2 Auto Mode - Light Load Operation
          1. 8.4.3.2.1 Diode Emulation
          2. 8.4.3.2.2 Frequency Reduction
        3. 8.4.3.3 FPWM Mode - Light Load Operation
        4. 8.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 8.4.3.5 Dropout
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Choosing the Switching Frequency
        2. 9.2.2.2  Setting the Output Voltage
        3. 9.2.2.3  Inductor Selection
        4. 9.2.2.4  Output Capacitor Selection
        5. 9.2.2.5  Input Capacitor Selection
        6. 9.2.2.6  BOOT Capacitor
        7. 9.2.2.7  BOOT Resistor
        8. 9.2.2.8  VCC
        9. 9.2.2.9  BIAS
        10. 9.2.2.10 CFF and RFF Selection
        11. 9.2.2.11 External UVLO
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Systems Characteristics

The following values are specified by design provided that the component values in the typical application circuit are used.  Limits apply over the junction temperature range of -40°C to +150°C, unless otherwise noted. Minimum and Maximum limits are derived using test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 13.5 V.  VIN1 shorted to VIN2 = VIN.  VOUT is output setting. These parameters are not tested in production.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
EFFICIENCY
ƞ5V_2p1MHz Typical 2.1 MHz efficiency VOUT = 5 V, IOUT = 3.5 A, RBOOT = 0 Ω 93 %
VOUT = 5 V, IOUT = 100 µA, RBOOT = 0 Ω 73
ƞ5V_400kHz Typical 400 kHz efficiency  VOUT = 5 V, IOUT = 3.5 A, RBOOT = 0 Ω 95 %
VOUT = 5 V, IOUT = 100 µA, RBOOT = 0 Ω 76
RANGE OF OPERATION
VVIN_MIN1 VIN for full functionality at reduced load, after start-up. VOUT set to 3.3 V 3.0 V
VVIN_MIN2 VIN for full functionality at 100% of maximum rated load, after start-up. VOUT set to 3.3 V 3.95 V
IQ-VIN Operating quiescent current(1) VOUT = 3.3 V, IOUT = 0 A, Auto mode, RFBT=1 MΩ 7 µA
VOUT = 5 V, IOUT = 0 A, Auto mode, RFBT=1 MΩ 10
VOUT5 Output voltage for 5V factory option VIN = 5.8 V to 36 V, IOUT = 3.5A 4.9 5 5.1 V
Auto mode, VIN = 5.5V to 36 V, IOUT = 100 µA to 100 mA 4.9 5.05 5.125 V
VOUT3 Output voltage for 3.3V factory option VIN = 3.9 V to 36 V, IOUT = 3.5 A 3.24 3.3 3.35 V
VIN= 3.9 V to 36 V, IOUT = 100 µA to 100 mA 3.24 3.33 3.38 V
DMAX Maximum switch duty cycle fSW =1.85 MHz 87 %
While in frequency fold back 98 %
RBOOT
tRISE SW node rise time RBOOT = 0 Ω, IOUT = 2 A (10% to 80%) 2.15 ns
RBOOT = 100 Ω, IOUT = 2 A (10% to 80%) 2.7 ns
See detailed description for the meaning of this specification and how it can be calculated.