SNVSBK9C November 2019 – September 2020 LM63635-Q1
The output voltage of the LM63635-Q1 is set by the condition of the VSEL input. The condition of this input is tested when the device is first enabled. Once the converter is running, the voltage selection is fixed and cannot be changed until the next power-on cycle. Table 8-2 shows the selection programming. The LM63635-Q1 contains an integrated voltage divider connected to the FB input. The converter regulates the voltage on the FB input to 5 V, 3.3 V, or 1 V, as selected. In ADJ mode, the voltage on the FB input is regulated to 1 V and the internal divider is disabled. In this case, an external voltage divider is used to set the desired output voltage anywhere within the recommended operating range. ADJ mode is programmed by connecting 10 kΩ from the VSEL input to ground. Although not recommenced, if this input is left floating, the device enters ADJ mode. See Section 184.108.40.206 for details of selecting the FB divider resistors.
See Section 7 for ensured specifications regarding the accuracy of the FB voltage and input current to the FB pin.
Providing internal voltage dividers for the 5-V and 3.3-V modes saves external components, reducing both board space and component cost. The relatively large values of the internal dividers reduce the load on the output, helping to improve the light load efficiency of the converter. In addition, since the divider is inside the device, it is less likely to pick up externally generated noise.
|VSEL INPUT||OUTPUT VOLTAGE|
|10 kΩ to AGND||ADJ|
|Float (not recommended)||ADJ|