SNVSCF0
October 2024
LM65680-Q1
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Descriptions
7.3.1
Output Voltage Selection
7.3.2
EN Pin and Use as VIN UVLO
7.3.3
Device Configuration
7.3.4
Single-Output Dual-Phase Operation
7.3.5
Mode Selection
7.3.5.1
MODE/SYNC Pin Uses for Synchronization
7.3.5.2
Clock Locking
7.3.6
Adjustable Switching Frequency
7.3.7
Dual Random Spread Spectrum (DRSS)
7.3.8
Internal LDO, VCC UVLO, and BIAS Input
7.3.9
Bootstrap Voltage (BST Pin)
7.3.10
Soft Start and Recovery From Dropout
7.3.11
Safety Features
7.3.11.1
Power-Good Monitor
7.3.11.2
Overcurrent and Short-Circuit Protection
7.3.11.3
Hiccup
7.3.11.4
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Active Mode
7.4.2.1
Peak Current Mode Operation
7.4.2.2
Auto Mode Operation
7.4.2.2.1
Diode Emulation
7.4.2.3
FPWM Mode Operation
8
Application and Implementation
8.1
Application Information
8.1.1
Power Train Components
8.1.1.1
Buck Inductor
8.1.1.2
Output Capacitors
8.1.1.3
Input Capacitors
8.1.1.4
EMI Filter
8.1.2
Error Amplifier and Compensation
8.1.3
Maximum Ambient Temperature
8.1.3.1
Derating Curves
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Inductor Selection
8.2.2.2
Output Capacitors
8.2.2.3
Feed-forward Capacitor (CFF)
8.2.2.4
Input Capacitor Selection
8.2.2.5
Choosing the Switching Frequency
8.2.2.6
Setting the Output Voltage
8.2.2.7
Compensation Components
8.2.2.8
CBST
8.2.2.9
External UVLO
8.2.3
Application Curves
8.3
Best Design Practices
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.1.1
Ground and Thermal Considerations
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Development Support
9.2
Documentation Support
9.2.1
Related Documentation
9.2.1.1
PCB Layout Resources
9.2.1.2
Thermal Design Resources
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
RZY|26
MPQF691D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvscf0_oa
1
Features
AEC-Q100 qualified for automotive applications:
Temperature grade 1: –40°C to +125°C, T
A
Wide input voltage range: 3V to
70V
1% accurate, V
OUT
from 0.8V to 60V
Optimized for low EMI requirements
Facilitates
CISPR 25 Class 5
compliance
Pin-configurable dual-random spread spectrum and slew-rate control reduce peak emissions
Enhanced
HotRod™
QFN package with symmetrical pinout
Switching frequency from 300kHz to 2.2MHz
Pin-configurable AUTO or FPWM operation
Low minimum on time: 36ns (typical)
Enables 36V to 3.3V conversion at 2.1MHz
High-efficiency power conversion
> 95% peak efficiency, 12V
IN
to 5V
OUT
, 400kHz
No-load input current:
2.1
µA
High power density
Internal compensation, OCP, and TSD
4.5mm × 4.5mm eQFN-26 with wettable flanks
Θ
JA
= 18°C/W (
LM65680-Q1EVM
)
VIN to PGND pin clearance: 1.1mm