SNOSD87A July   2021  – February 2022 LM74501-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Enable
      4. 8.3.4 Gate Driver
      5. 8.3.5 SW (Battery Voltage Monitoring)
      6. 8.3.6 Gate Discharge Timer
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Full Conduction Mode
      3. 8.4.3 VDS Clamp
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reverse Battery Protection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 MOSFET Selection
        3. 9.2.2.3 Gate Discharge Timer Capacitor Selection (CT)
        4. 9.2.2.4 Charge Pump VCAP, Input and Output Capacitance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Reverse Battery Protection

P-FET based reverse polarity protection is a very commonly used scheme in automotive applications to achieve low insertion loss protection solution. A low loss reverse polarity protection solution can be realized using the LM74501-Q1 with an external N-FET to replace P-FET based solution. The LM74501-Q1-based reverse polarity protection solution offers input TVS-less performance during ISO7637-2 pulse 1 event, better cold crank performance (low VIN operation) and smaller solution size compared to P-FET based solution. Figure 9-1 compares the performance benefits of LM74501-Q1 + N-FET over a traditional P-FET based reverse polarity protection solution.

  • As shown in Figure 9-1, a given power level LM74501-Q1 + N-FET solution can be 50% smaller than a similar power rated P-FET solution.
  • The second advantage that the LM74501-Q1 offers over a traditional P-FET is TVS-less operation for the body control module load driving paths where reverse current blocking is not a must-have feature and output loads are capable of handling negative voltage and reverse current for a short duration of the time.
  • As PFET is self biased by simply pulling its gate pin low, P-FET shows poorer cold crank performance (low VIN operation) compared to the LM74501-Q1. During severe cold crank where battery voltage falls below 4 V, P-FET series resistance increases drastically as shown in Figure 9-1. This increase leads to higher voltage drop across the PFET. Also, with a higher gate-to-source threshold (VT), this can sometimes lead to system reset due to turning off of the P-FET. On the other side, the LM74501-Q1 has excellent severe cold crank performance. The LM74501-Q1 keeps the external FET completely enhanced even when input voltage falls to 3.2 V during severe cold crank operation.
Figure 9-1 PFET vs LM74501-Q1 Reverse Polarity Protection Solution Comparison