SNOS674G November   1997  – April 2020 LMC6482

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Rail-to-Rail Input
      2.      Rail-to-Rail Output
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics for V+ = 5 V
    6. 6.6 Electrical Characteristics for V+ = 3 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Amplifier Topology
      2. 7.3.2 Input Common-Mode Voltage Range
      3. 7.3.3 Rail-to-Rail Output
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Upgrading Applications
      2. 8.1.2 Data Acquisition Systems
      3. 8.1.3 Instrumentation Circuits
      4. 8.1.4 Spice Macromodel
    2. 8.2 Typical Applications
      1. 8.2.1 3-V Single-Supply Buffer Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Capacitive Load Compensation
          2. 8.2.1.2.2 Capacitive Load Tolerance
          3. 8.2.1.2.3 Compensating For Input Capacitance
          4. 8.2.1.2.4 Offset Voltage Adjustment
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Single-Supply Applications
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics for V+ = 3 V

Unless otherwise specified, all limits specified for TJ = 25°C, V+ = 3 V, V = 0 V, VCM = VO = V+/2 and RL > 1 MΩ.
PARAMETER TEST CONDITIONS TJ = 25°C AT TEMPERATURE EXTREMES(4) UNIT
MIN TYP(1) MAX(2) MIN TYP(1) MAX(2)
DC ELECTRICAL CHARACTERISTICS
VOS Input offset voltage LMC6482AI 0.9 2 2.7 mV
LMC6482I 0.9 3 3.7
LMC6482M 0.9 3 3.8
TCVOS Input offset voltage average drift 2 μV/°C
IB Input bias current 0.02 pA
IOS Input offset current 0.01 pA
CMRR Common mode rejection ratio 0 V ≤ VCM ≤ 3 V LMC6482AI 64 74 dB
LMC6482I 60 74
LMC6482M 60 74
PSRR Power supply rejection ratio 3 V ≤ V+ ≤ 15 V, V = 0 V LMC6482AI 68 80 dB
LMC6482I 60 80
LMC6482M 60 80
VCM Input common-mode voltage For CMRR ≥ 50 dB LMC6482AI V −0.25 0 V
LMC6482I V −0.25 0
LMC6482M V −0.25 0
LMC6482AI V+ V+ + 0.25 V
LMC6482I V+ V+ + 0.25
LMC6482M V+ V+ + 0.25
VO Output swing RL = 2 kΩ to V+/2 2.8 V
0.2
RL = 600 Ω to V+/2 LMC6482AI 2.5 2.7
LMC6482I 2.5 2.7
LMC6482M 2.5 2.7
LMC6482AI 0.37 0.6
LMC6482I 0.37 0.6
LMC6482M 0.37 0.6
IS Supply current Both amplifiers LMC6482AI 0.825 1.2 1.5 mA
LMC6482I 0.825 1.2 1.5
LMC6482M 0.825 1.2 1.6
AC ELECTRICAL CHARACTERISTICS
SR Slew rate See (3) 0.9 V/μs
GBW Gain-bandwidth product 1 MHz
T.H.D. Total harmonic distortion f = 10 kHz, AV = −2
RL = 10 kΩ, VO = 2 VPP
0.01%
Typical values represent the most likely parametric norm.
All limits are specified by testing or statistical analysis.
Connected as voltage follower with 2-V step input. Number specified is the slower of either the positive or negative slew rates.
See Recommended Operating Conditions for operating temperature ranges.