SNOS674G November   1997  – April 2020 LMC6482


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Rail-to-Rail Input
      2.      Rail-to-Rail Output
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics for V+ = 5 V
    6. 6.6 Electrical Characteristics for V+ = 3 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Amplifier Topology
      2. 7.3.2 Input Common-Mode Voltage Range
      3. 7.3.3 Rail-to-Rail Output
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Upgrading Applications
      2. 8.1.2 Data Acquisition Systems
      3. 8.1.3 Instrumentation Circuits
      4. 8.1.4 Spice Macromodel
    2. 8.2 Typical Applications
      1. 8.2.1 3-V Single-Supply Buffer Circuit
        1. Design Requirements
        2. Detailed Design Procedure
          1. Capacitive Load Compensation
          2. Capacitive Load Tolerance
          3. Compensating For Input Capacitance
          4. Offset Voltage Adjustment
        3. Application Curves
      2. 8.2.2 Typical Single-Supply Applications
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

It is generally recognized that any circuit that must operate with less than 1000 pA of leakage current requires special layout of the PC board. To take advantage of the ultra-low input current of the LMC6482, typically less than 20 fA, an excellent layout is essential. Fortunately, the techniques of obtaining low leakages are quite simple. First, do not ignore the surface leakage of the PCB, Even through the leakage current may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable.

To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LM6482s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, and so forth connected to the inputs of the op amp, as in Figure 78. To have a significant effect, place guard rings on both the top and bottom of the PCB. This PC foil must then be connected to a voltage that is at the same voltage as the amplifier inputs, because no leakage current can flow between two points at the same potential. For example, a PCB trace-to-pad resistance of 1012 Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5-V bus adjacent to the pad of the input. This leakage would cause a 250 times degradation from the actual performance of the LMC6482. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011 Ω causes only 0.05 pA of leakage current. See Figure 79 through Figure 81 for typical connections of guard rings for standard op-amp configurations.

Be aware that when it is inappropriate to lay out a PCB for the sake of just a few circuits, another technique is even better than a guard ring on a PCB: Do not insert the input pin of the amplifier into the PCB at all, but bend it up in the air, and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PCB construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 82.