SNOSD74B May   2019  – January 2020 LMG1025-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical (Simplified) System Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stage
      2. 7.3.2 Output Stage
      3. 7.3.3 Bias Supply and Under Voltage Lockout
      4. 7.3.4 Overtemperature Protection (OTP)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Handling Ground Bounce
        2. 8.2.2.2 Creating Nanosecond Pulse
      3. 8.2.3 VDD and Overshoot
      4. 8.2.4 Operating at Higher Frequency
      5. 8.2.5 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Gate Drive Loop Inductance and Ground Connection
      2. 10.1.2 Bypass Capacitor
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

VDD = 5V, good feed-through bypass capacitor from VDD to GND pin, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC Characteristics
IVDD, Q VDD Quiescent Current IN+ = IN- = 0 V 75 µA
IVDD, op VDD Operating Current fsw = 30 MHz, no load, 2Ω as ROUTH and ROUTL 40 mA
fsw = 30 MHz, 100-pF load, 2Ω as ROUTH and ROUTL 51 mA
VDD, UVLO Under-voltage Lockout VDD rising 4.0 4.35 V
ΔVDD, UVLO UVLO Hysteresis 85 mV
TOTP Over temperature shutdown, turn-off threshold 170 °C
ΔTOTP Over temperature hysteresis 20 °C
Input DC Characteristics
VIH IN+, IN- high threshold 1.7 2.6 V
VIL IN+, IN- low threshold 1.1 1.8 V
VHYST IN+, IN- hysteresis 0.38 1 V
RIN+ Positive input pull-down resistance To GND 100 150 250 kΩ
RIN- Negative input pull-up resistance to VDD 100 150 250 kΩ
CIN+ Positive input pin capacitance To GND 1.45 pF
CIN- Negative input pin capacitance To GND 1.45 pF
Output DC Characteristics
VOL OUTL voltage IOUTL = 100 mA, IN+= IN- = 0 V 45 mV
VDD-VOH OUTH voltage IOUTH = 100 mA, IN+= 5 V, IN- = 0 V, VDD = 5 V 52 mV
IOH Peak source current VOUTH = 0 V, IN+= 5 V, IN- = 0 V, VDD = 5 V 7 A
IOL Peak sink current VOUTL = 5 V, IN+= IN- = 0 V, VDD = 5 V 5 A