SNAS577G February   2012  – August 2018 LMK00304

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Functional Block Diagram
      2.      LVPECL Output Swing (VOD) vs. Frequency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Differential Voltage Measurement Terminology
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VCC and VCCO Power Supplies
      2. 8.3.2 Clock Inputs
      3. 8.3.3 Clock Outputs
        1. 8.3.3.1 Reference Output
  9. 9 Application and Implementation
    1. 9.1 Driving the Clock Inputs
    2. 9.2 Crystal Interface
    3. 9.3 Termination and Use of Clock Drivers
      1. 9.3.1 Termination for DC-Coupled Differential Operation
      2. 9.3.2 Termination for AC-Coupled Differential Operation
      3. 9.3.3 Termination for Single-Ended Operation
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Sequencing
    2. 10.2 Current Consumption and Power Dissipation Calculations
      1. 10.2.1 Power Dissipation Example: Worst-Case Dissipation
    3. 10.3 Power Supply Bypassing
      1. 10.3.1 Power Supply Ripple Rejection
    4. 10.4 Thermal Management
      1. 10.4.1 Support for PCB Temperature up to 105°C
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2 Current Consumption and Power Dissipation Calculations

The current consumption values specified in Electrical Characteristics can be used to calculate the total power dissipation and IC power dissipation for any device configuration. The total VCC core supply current (ICC_TOTAL) can be calculated using Equation 5:

Equation 5. ICC_TOTAL = ICC_CORE + ICC_BANKS + ICC_CMOS

where

  • ICC_CORE is the VCC current for core logic and input blocks and depends on selected input (CLKinX or OSCin).
  • ICC_BANKS is the VCC current for Banks A & B and depends on the selected output type (ICC_PECL, ICC_LVDS, ICC_HCSL, or 0 mA if disabled).
  • ICC_CMOS is the VCC current for the LVCMOS output (or 0 mA if REFout is disabled).

Because the output supplies (VCCOA, VCCOB, VCCOC) can be powered from 3 independent voltages, the respective output supply currents (ICCO_BANK_A, ICCO_BANK_B, and ICCO_CMOS) should be calculated separately.

ICCO_BANK for either Bank A or B may be taken as 50% of the corresponding output supply current specified for two banks (ICCO_PECL, ICCO_LVDS, or ICCO_HCSL) provided the output loading matches the specified conditions. Otherwise, ICCO_BANK should be calculated per bank using Equation 6:

Equation 6. ICCO_BANK = IBANK_BIAS + (N × IOUT_LOAD)

where

  • IBANK_BIAS is the output bank bias current (fixed value).
  • IOUT_LOAD is the DC load current per loaded output pair.
  • N is the number of loaded output pairs (N = 0 to 2).

Table 6 shows the typical IBANK_BIAS values and IOUT_LOAD expressions for LVPECL, LVDS, and HCSL.

For LVPECL, it is possible to use a larger termination resistor (RT) to ground instead of terminating with 50 Ω to VTT = Vcco - 2 V; this technique is commonly used to eliminate the extra termination voltage supply (VTT) and potentially reduce device power dissipation at the expense of lower output swing. For example, when Vcco is 3.3 V, a RT value of 160 Ω to ground will eliminate the 1.3 V termination supply without sacrificing much output swing. In this case, the typical IOUT_LOAD is 25 mA, so ICCO_BANK for one LVPECL bank reduces to 63 mA (vs. 67.5 mA with 50 Ω resistors to Vcco - 2 V).

Table 6. Typical Output Bank Bias and Load Currents

CURRENT PARAMETER LVPECL LVDS HCSL
IBANK_BIAS 13 mA 11.6 mA 2.4 mA
IOUT_LOAD (VOH - VTT)/RT + (VOL - VTT)/RT 0 mA
(No DC load current)		 VOH/RT

Once the current consumption is known for each supply, the total power dissipation (PTOTAL) can be calculated:

Equation 7. PTOTAL = (VCC × ICC_TOTAL) + (VCCOA × ICCO_BANK) + (VCCOB × ICCO_BANK) + (VCCOC × ICCO_CMOS)

If the device is configured with LVPECL and/or HCSL outputs, then it is also necessary to calculate the power dissipated in any termination resistors (PRT_ PECL and PRT_HCSL) and in any LVPECL termination voltages (PVTT_PECL). The external power dissipation values can be calculated as follows:

Equation 8. PRT_PECL (per LVPECL pair) = (VOH – VTT)2/RT + (VOL – VTT)2/RT
Equation 9. PVTT_PECL (per LVPECL pair) = VTT × [(VOH - VTT)/RT + (VOL – VTT)/RT]
Equation 10. PRT_HCSL (per HCSL pair) = VOH2 / RT

Finally, the IC power dissipation (PDEVICE) can be computed by subtracting the external power dissipation values from PTOTAL as follows:

Equation 11. PDEVICE = PTOTAL – N1 × (PRT_PECL + PVTT_PECL) – N2 × PRT_HCSL

where

  • N1 is the number of LVPECL output pairs with termination resistors to VTT (usually Vcco - 2 V or GND).
  • N2 is the number of HCSL output pairs with termination resistors to GND.